From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753343AbcEIN3O (ORCPT ); Mon, 9 May 2016 09:29:14 -0400 Received: from regular1.263xmail.com ([211.150.99.135]:34410 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751282AbcEIN3N (ORCPT ); Mon, 9 May 2016 09:29:13 -0400 X-Greylist: delayed 741 seconds by postgrey-1.27 at vger.kernel.org; Mon, 09 May 2016 09:29:11 EDT X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 X-KSVirus-check: 0 X-RL-SENDER: wulf@rock-chips.com X-FST-TO: balbi@kernel.org X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: wulf@rock-chips.com X-UNIQUE-TAG: <0665290917b2e6ac57d325f26d896004> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Message-ID: <57309096.9010300@rock-chips.com> Date: Mon, 09 May 2016 21:28:54 +0800 From: William Wu User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.6.0 MIME-Version: 1.0 To: Felipe Balbi , gregkh@linuxfoundation.org, heiko@sntech.de CC: briannorris@google.com, dianders@google.com, kever.yang@rock-chips.com, huangtao@rock-chips.com, frank.wang@rock-chips.com, eddie.cai@rock-chips.com, John.Youn@synopsys.com, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Subject: Re: [PATCH 3/4] usb: dwc3: make usb2 phy interface configurable in DT References: <1462794377-6528-1-git-send-email-william.wu@rock-chips.com> <1462794377-6528-4-git-send-email-william.wu@rock-chips.com> <878tzj1l1o.fsf@intel.com> In-Reply-To: <878tzj1l1o.fsf@intel.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 05/09/2016 08:18 PM, Felipe Balbi wrote: > Hi, > > William Wu writes: >> Add snps,phyif_utmi_16_bits devicetree property. USB2 phy > this needs a quirk_ prefix... Yes, maybe a quirk is more proper. As you mentioned, the PHYIf can be configured during coreconsultant. But for some specific usb cores(e.g. rk3399 soc dwc3), the default PHYIf configuration is error, so we need to reconfigure it by software. > >> interface is hardware property, and it's platform dependent, >> so we need to configure it in devicetree to set the core to >> support a UTMI+ PHY with an 8- or 16-bit interface. >> >> And refer to the dwc3 databook, the GUSB2PHYCFG.USBTRDTIM >> must set to the corresponding value according to the usb2 >> phy interface. > right, that's fine. But also note on section 8.1.1 Table 8-1 where it > states: > > |-------------+------------------------------------------------------------| > | GUSB2PHYCFG | Program the following PHY configuration fields: USBTrdTim, | > | | FSIntf, PHYIf, TOUTCal, or leave the default values if | > | | the correct power-on values were selected during | > | | coreConsultant configuration. Note: The PHY must not | > | | be enabled for auto-resume in device mode. Hence the | > | | field GUSB2PHYCFG[15] (ULPIAutoRes) must be written | > | | with '0' during the power-on initialization in case | > | | the reset value is '1'. | > | | | > |-------------+------------------------------------------------------------| > > You only need this because your core was badly configured in > coreConsultant. >