From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <linux-kernel-owner@vger.kernel.org>
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
	id S1752011AbcEJMAo (ORCPT <rfc822;w@1wt.eu>);
	Tue, 10 May 2016 08:00:44 -0400
Received: from mx07-00178001.pphosted.com ([62.209.51.94]:8646 "EHLO
	mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK)
	by vger.kernel.org with ESMTP id S1751498AbcEJMAc (ORCPT
	<rfc822;linux-kernel@vger.kernel.org>);
	Tue, 10 May 2016 08:00:32 -0400
Subject: Re: [PATCH] pinctrl: stm32: Implement .pin_config_dbg_show()
To: Linus Walleij <linus.walleij@linaro.org>
References: <1461939943-24752-1-git-send-email-patrice.chotard@st.com>
 <CACRpkdZ=KsPL1mBS1bLi=jYsv=Vb1QNBi8XPAJW50doPcwBuZg@mail.gmail.com>
CC: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
        Maxime Coquelin <mcoquelin.stm32@gmail.com>
From: Patrice Chotard <patrice.chotard@st.com>
Message-ID: <5731CD41.60506@st.com>
Date: Tue, 10 May 2016 14:00:01 +0200
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101
 Thunderbird/38.7.2
MIME-Version: 1.0
In-Reply-To: <CACRpkdZ=KsPL1mBS1bLi=jYsv=Vb1QNBi8XPAJW50doPcwBuZg@mail.gmail.com>
Content-Type: text/plain; charset="utf-8"; format=flowed
Content-Transfer-Encoding: 7bit
X-Originating-IP: [10.48.1.66]
X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2016-05-10_05:,,
 signatures=0
Sender: linux-kernel-owner@vger.kernel.org
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org



On 05/10/2016 01:50 PM, Linus Walleij wrote:
> On Fri, Apr 29, 2016 at 4:25 PM,  <patrice.chotard@st.com> wrote:
>
>> From: Patrice Chotard <patrice.chotard@st.com>
>>
>> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
> Patch applied! Because this gives good debuggability.
>
> But think about refactorings:
>
>> +static bool stm32_pconf_input_get(struct stm32_gpio_bank *bank,
>> +       unsigned int offset)
>> +{
>> +       unsigned long flags;
>> +       u32 val;
>> +
>> +       clk_enable(bank->clk);
>> +       spin_lock_irqsave(&bank->lock, flags);
>> +
>> +       val = !!(readl_relaxed(bank->base + STM32_GPIO_IDR) & BIT(offset));
>> +
>> +       spin_unlock_irqrestore(&bank->lock, flags);
>> +       clk_disable(bank->clk);
>> +
>> +       return val;
>> +}
>> +
>> +static bool stm32_pconf_output_get(struct stm32_gpio_bank *bank,
>> +       unsigned int offset)
>> +{
>> +       unsigned long flags;
>> +       u32 val;
>> +
>> +       clk_enable(bank->clk);
>> +       spin_lock_irqsave(&bank->lock, flags);
>> +       val = !!(readl_relaxed(bank->base + STM32_GPIO_ODR) & BIT(offset));
>> +
>> +       spin_unlock_irqrestore(&bank->lock, flags);
>> +       clk_disable(bank->clk);
>> +
>> +       return val;
>> +}
Hi Linus

> Don't you think these two look very similar for example.

You 're right, i will rework this in a separate patch

Thanks

Patrice

>
> But that can be fixed later, debuggability is more important.
>
> Yours,
> Linus Walleij