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From: Paolo Bonzini <pbonzini@redhat.com>
To: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>,
	rkrcmar@redhat.com, joro@8bytes.org, bp@alien8.de,
	gleb@kernel.org, alex.williamson@redhat.com
Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
	wei@redhat.com, sherry.hurwitz@amd.com
Subject: Re: [PART1 V5 13/13] svm: Manage vcpu load/unload when enable AVIC
Date: Tue, 10 May 2016 17:43:39 +0200	[thread overview]
Message-ID: <573201AB.2050006@redhat.com> (raw)
In-Reply-To: <1462388992-25242-14-git-send-email-Suravee.Suthikulpanit@amd.com>



On 04/05/2016 21:09, Suravee Suthikulpanit wrote:
> From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
> 
> When a vcpu is loaded/unloaded to a physical core, we need to update
> host physical APIC ID information in the Physical APIC-ID table
> accordingly.
> 
> Also, when vCPU is blocking/un-blocking (due to halt instruction),
> we need to make sure that the is-running bit in set accordingly in the
> physical APIC-ID table.
> 
> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
> Reviewed-by: Radim Krčmář <rkrcmar@redhat.com>
> ---

I think this is the only patch that needs a little more work, because 
there are a bunch of unused return values that really should be 
WARN_ON.  In addition the load and put cases are different enough that 
they should be separate functions.

Can you please test this?

diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index f3dbf1d33a61..3168d6c8d24f 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -184,7 +184,7 @@ struct vcpu_svm {
 	u32 ldr_reg;
 	struct page *avic_backing_page;
 	u64 *avic_physical_id_cache;
-	bool avic_is_blocking;
+	bool avic_is_running;
 };
 
 #define AVIC_LOGICAL_ID_ENTRY_GUEST_PHYSICAL_ID_MASK	(0xFF)
@@ -1321,18 +1321,20 @@ free_avic:
 /**
  * This function is called during VCPU halt/unhalt.
  */
-static int avic_set_running(struct kvm_vcpu *vcpu, bool is_run)
+static void avic_set_running(struct kvm_vcpu *vcpu, bool is_run)
 {
 	u64 entry;
 	int h_physical_id = __default_cpu_present_to_apicid(vcpu->cpu);
 	struct vcpu_svm *svm = to_svm(vcpu);
 
 	if (!kvm_vcpu_apicv_active(vcpu))
-		return 0;
+		return;
+
+	svm->avic_is_running = is_run;
 
 	/* ID = 0xff (broadcast), ID > 0xff (reserved) */
-	if (h_physical_id >= AVIC_MAX_PHYSICAL_ID_COUNT)
-		return -EINVAL;
+	if (WARN_ON(h_physical_id >= AVIC_MAX_PHYSICAL_ID_COUNT))
+		return;
 
 	entry = READ_ONCE(*(svm->avic_physical_id_cache));
 	WARN_ON(is_run == !!(entry & AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK));
@@ -1341,36 +1343,45 @@ static int avic_set_running(struct kvm_vcpu *vcpu, bool is_run)
 	if (is_run)
 		entry |= AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK;
 	WRITE_ONCE(*(svm->avic_physical_id_cache), entry);
-
-	return 0;
 }
 
-static int avic_vcpu_load(struct kvm_vcpu *vcpu, int cpu, bool is_load)
+static void avic_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
 {
 	u64 entry;
+	/* ID = 0xff (broadcast), ID > 0xff (reserved) */
 	int h_physical_id = __default_cpu_present_to_apicid(cpu);
 	struct vcpu_svm *svm = to_svm(vcpu);
 
 	if (!kvm_vcpu_apicv_active(vcpu))
-		return 0;
+		return;
 
-	/* ID = 0xff (broadcast), ID > 0xff (reserved) */
-	if (h_physical_id >= AVIC_MAX_PHYSICAL_ID_COUNT)
-		return -EINVAL;
+	if (WARN_ON(h_physical_id >= AVIC_MAX_PHYSICAL_ID_COUNT))
+		return;
 
 	entry = READ_ONCE(*(svm->avic_physical_id_cache));
-	WARN_ON(is_load && (entry & AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK));
+	WARN_ON(entry & AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK);
+
+	entry &= ~AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK;
+	entry |= (h_physical_id & AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK);
 
 	entry &= ~AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK;
-	if (is_load) {
-		entry &= ~AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK;
-		entry |= (h_physical_id & AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK);
-		if (!svm->avic_is_blocking)
-			entry |= AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK;
-	}
+	if (svm->avic_is_running)
+		entry |= AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK;
+
 	WRITE_ONCE(*(svm->avic_physical_id_cache), entry);
+}
 
-	return 0;
+static void avic_vcpu_put(struct kvm_vcpu *vcpu)
+{
+	u64 entry;
+	struct vcpu_svm *svm = to_svm(vcpu);
+
+	if (!kvm_vcpu_apicv_active(vcpu))
+		return;
+
+	entry = READ_ONCE(*(svm->avic_physical_id_cache));
+	entry &= ~AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK;
+	WRITE_ONCE(*(svm->avic_physical_id_cache), entry);
 }
 
 static void svm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
@@ -1436,10 +1447,10 @@ static struct kvm_vcpu *svm_create_vcpu(struct kvm *kvm, unsigned int id)
 			goto free_page4;
 	}
 
-	/* We initialize this flag to one to make sure that the is_running
+	/* We initialize this flag to true to make sure that the is_running
 	 * bit would be set the first time the vcpu is loaded.
 	 */
-	svm->avic_is_blocking = false;
+	svm->avic_is_running = true;
 
 	svm->nested.hsave = page_address(hsave_page);
 
@@ -1518,7 +1529,7 @@ static void svm_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
 	if (static_cpu_has(X86_FEATURE_RDTSCP))
 		wrmsrl(MSR_TSC_AUX, svm->tsc_aux);
 
-	avic_vcpu_load(vcpu, cpu, true);
+	avic_vcpu_load(vcpu, cpu);
 }
 
 static void svm_vcpu_put(struct kvm_vcpu *vcpu)
@@ -1526,7 +1537,7 @@ static void svm_vcpu_put(struct kvm_vcpu *vcpu)
 	struct vcpu_svm *svm = to_svm(vcpu);
 	int i;
 
-	avic_vcpu_load(vcpu, 0, false);
+	avic_vcpu_put(vcpu);
 
 	++vcpu->stat.host_state_reload;
 	kvm_load_ldt(svm->host.ldt);
@@ -1545,13 +1556,11 @@ static void svm_vcpu_put(struct kvm_vcpu *vcpu)
 
 static void svm_vcpu_blocking(struct kvm_vcpu *vcpu)
 {
-	to_svm(vcpu)->avic_is_blocking = true;
 	avic_set_running(vcpu, false);
 }
 
 static void svm_vcpu_unblocking(struct kvm_vcpu *vcpu)
 {
-	to_svm(vcpu)->avic_is_blocking = false;
 	avic_set_running(vcpu, true);
 }
 

The two functions now have the same signature as their callers,
svm_vcpu_load and svm_vcpu_put.

Thanks,

Paolo

  reply	other threads:[~2016-05-10 15:43 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-04 19:09 [PART1 V5 00/13] KVM: x86: Introduce SVM AVIC support Suravee Suthikulpanit
2016-05-04 19:09 ` [PART1 V5 01/13] KVM: x86: Misc LAPIC changes to expose helper functions Suravee Suthikulpanit
2016-05-04 19:09 ` [PART1 V5 02/13] KVM: x86: Rename kvm_apic_get_reg to kvm_lapic_get_reg Suravee Suthikulpanit
2016-05-04 19:09 ` [PART1 V5 03/13] KVM: x86: Introducing kvm_x86_ops VM init/destroy hooks Suravee Suthikulpanit
2016-05-04 19:09 ` [PART1 V5 04/13] KVM: x86: Introducing kvm_x86_ops VCPU blocking/unblocking hooks Suravee Suthikulpanit
2016-05-04 19:09 ` [PART1 V5 05/13] KVM: split kvm_vcpu_wake_up from kvm_vcpu_kick Suravee Suthikulpanit
2016-05-04 19:09 ` [PART1 V5 06/13] svm: Introduce new AVIC VMCB registers Suravee Suthikulpanit
2016-05-04 19:09 ` [PART1 V5 07/13] KVM: x86: Detect and Initialize AVIC support Suravee Suthikulpanit
2016-05-09 10:27   ` Borislav Petkov
2016-05-10  9:14   ` Borislav Petkov
2016-05-10 14:43     ` Paolo Bonzini
2016-05-10 16:24       ` Borislav Petkov
2016-05-10 17:00         ` Paolo Bonzini
2016-05-10 17:06           ` Borislav Petkov
2016-05-04 19:09 ` [PART1 V5 08/13] svm: Add interrupt injection via AVIC Suravee Suthikulpanit
2016-05-10  9:19   ` Borislav Petkov
2016-05-10 14:50     ` Paolo Bonzini
2016-06-01  4:02       ` Suravee Suthikulpanit
2016-05-04 19:09 ` [PART1 V5 09/13] svm: Add VMEXIT handlers for AVIC Suravee Suthikulpanit
2016-05-04 19:09 ` [PART1 V5 10/13] KVM: x86: Introducing kvm_x86_ops.apicv_post_state_restore Suravee Suthikulpanit
2016-05-04 19:09 ` [PART1 V5 11/13] svm: Do not expose x2APIC when enable AVIC Suravee Suthikulpanit
2016-05-04 19:09 ` [PART1 V5 12/13] svm: Do not intercept CR8 " Suravee Suthikulpanit
2016-05-10 15:12   ` Paolo Bonzini
2016-05-04 19:09 ` [PART1 V5 13/13] svm: Manage vcpu load/unload " Suravee Suthikulpanit
2016-05-10 15:43   ` Paolo Bonzini [this message]
2016-05-17 12:09     ` Paolo Bonzini
2016-06-01 18:18       ` Suravee Suthikulpanit
2016-06-01 18:37         ` Paolo Bonzini
2016-05-10 14:57 ` [PART1 V5 00/13] KVM: x86: Introduce SVM AVIC support Paolo Bonzini

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