From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752570AbcEKI2R (ORCPT ); Wed, 11 May 2016 04:28:17 -0400 Received: from arroyo.ext.ti.com ([198.47.19.12]:33431 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751792AbcEKI2P (ORCPT ); Wed, 11 May 2016 04:28:15 -0400 X-Greylist: delayed 650 seconds by postgrey-1.27 at vger.kernel.org; Wed, 11 May 2016 04:28:14 EDT Subject: Re: [PATCH v7 1/5] usb: dwc3: omap: use request_threaded_irq() To: Felipe Balbi References: <1462873919-20532-1-git-send-email-rogerq@ti.com> <1462873919-20532-2-git-send-email-rogerq@ti.com> <87a8jyi6ad.fsf@linux.intel.com> <5731B235.80505@ti.com> <87y47igr1g.fsf@linux.intel.com> CC: , , , , , , , , , , , From: Roger Quadros Message-ID: <5732EA85.6050601@ti.com> Date: Wed, 11 May 2016 11:17:09 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.7.2 MIME-Version: 1.0 In-Reply-To: <87y47igr1g.fsf@linux.intel.com> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Felipe, On 10/05/16 13:12, Felipe Balbi wrote: > > Hi, > > Roger Quadros writes: >>>> @@ -497,8 +503,8 @@ static int dwc3_omap_probe(struct platform_device *pdev) >>>> /* check the DMA Status */ >>>> reg = dwc3_omap_readl(omap->base, USBOTGSS_SYSCONFIG); >>>> >>>> - ret = devm_request_irq(dev, omap->irq, dwc3_omap_interrupt, 0, >>>> - "dwc3-omap", omap); >>>> + ret = devm_request_threaded_irq(dev, omap->irq, dwc3_omap_interrupt, >>>> + NULL, 0, "dwc3-omap", omap); >>> >>> if you're using threaded_irq, it's better to have a NULL top half and >>> valid bottom half. >> >> But in this case we don't need a bottom half as there is nothing to do :). >> >>> >>> In fact, since this will be shared, you could do a proper preparation >>> and on top half check if $this device generated the IRQ and >>> conditionally schedule the bottom half. Don't forget to mask device's >>> interrupts from top half so you can run without IRQF_ONESHOT. >>> >> >> Why do this at all if there is nothing to do in the bottom half? > > oh, but there is :-) > > The whole idea of threaded IRQs is that you spend as little time as > possible on top half and the (strong) recommendation is that you *only* > check if $this device generated the interrupt. Note that "checking if > $this device generated the interrupt" will be mandatory as soon as you > mark the IRQ line as shared ;-) > > So here's how this should look like: > > static irqreturn_t dwc3_omap_interrupt(int irq, void *_omap) > { > struct dwc3_omap *omap = _omap; > u32 reg; > > reg = readl(IRQSTATUS) > if (reg) { > mask_interrupts(omap); > return IRQ_WAKE_THREAD; > } > > return IRQ_HANDLED; This should be IRQ_NONE right? > } > > static irqreturn_t dwc3_omap_threaded_interrupt(int irq, void *_omap) > { > struct dwc3_omap *omap = _omap; > u32 reg; > > spin_lock(&omap->lock); Do we really need a spin_lock for the dwc3-omap driver? Currently we won't be doing anything other than just clearing the irqstatus and re-enabling the interrupts. > reg = readl(IRQSTATUS); > > if (reg & BIT0) > handle_bit_0(omap); > > if (reg & BIT1) > handle_bit_1(omap); > > unmask_interrupts(omap); > spin_unlock(&omap->lock); > > return IRQ_HANDLED; > } > > this will *always* behave well with RT and non-RT kernels. It also > allows for the user to change priorities on these interrupt handlers if > necessary. > -- cheers, -roger