From: Florian Fainelli <f.fainelli@gmail.com>
To: Ralf Baechle <ralf@linux-mips.org>
Cc: Paul Burton <paul.burton@imgtec.com>,
linux-mips@linux-mips.org, James Hogan <james.hogan@imgtec.com>,
Adam Buchbinder <adam.buchbinder@gmail.com>,
"Maciej W. Rozycki" <macro@imgtec.com>,
Joshua Kinard <kumba@gentoo.org>, Huacai Chen <chenhc@lemote.com>,
"Maciej W. Rozycki" <macro@linux-mips.org>,
Paul Gortmaker <paul.gortmaker@windriver.com>,
"Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>,
linux-kernel@vger.kernel.org,
"Peter Zijlstra (Intel)" <peterz@infradead.org>,
David Hildenbrand <dahi@linux.vnet.ibm.com>,
Andrew Morton <akpm@linux-foundation.org>,
David Daney <david.daney@cavium.com>,
Jonas Gorski <jogo@openwrt.org>,
Markos Chandras <markos.chandras@imgtec.com>,
Ingo Molnar <mingo@kernel.org>,
Alex Smith <alex.smith@imgtec.com>,
"Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Subject: Re: [PATCH 00/12] TLB/XPA fixes & cleanups
Date: Wed, 11 May 2016 12:17:10 -0700 [thread overview]
Message-ID: <57338536.9040209@gmail.com> (raw)
In-Reply-To: <20160511100335.GA14397@linux-mips.org>
On 05/11/2016 03:03 AM, Ralf Baechle wrote:
> On Tue, May 10, 2016 at 10:47:48AM -0700, Florian Fainelli wrote:
>
>>> Applied - but "MIPS: Separate XPA CPU feature into LPA and MVH" causes
>>> a massive conflict with Florian's RIXI patches
>>>
>>> [3/6] MIPS: Allow RIXI to be used on non-R2 or R6 core
>>> [4/6] MIPS: Move RIXI exception enabling after vendor-specific cpu_probe
>>> [5/6] MIPS: BMIPS: BMIPS4380 and BMIPS5000 support RIXI
>>>
>>> I figured unapplying those three, applying Paul's series then re-applying
>>> Florian's patch on top of the whole series will be the easier path as in
>>> leaving me with the smaller rejects to manage.
>>
>> Did you already push that to mips-for-linux-next? I can give it a quick
>> spin once you do so.
>
> I just pushed a tree with everything applied. HEAD of tree is
> 22702a86997c5aed2e479bfe0b24d10d66b09604 dated May 11 11:58:06; a version
> from earlier today was broken.
Boot tested on BMIPS5000 (BCM7425):
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
Thanks!
--
Florian
prev parent reply other threads:[~2016-05-11 19:17 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1460716620-13382-1-git-send-email-paul.burton@imgtec.com>
2016-04-15 10:36 ` [PATCH 01/12] MIPS: Separate XPA CPU feature into LPA and MVH Paul Burton
2016-04-15 10:36 ` [PATCH 02/12] MIPS: Fix HTW config on XPA kernel without LPA enabled Paul Burton
2016-04-15 10:36 ` [PATCH 03/12] MIPS: Remove redundant asm/pgtable-bits.h inclusions Paul Burton
2016-04-15 19:16 ` James Hogan
2016-04-15 21:19 ` Paul Burton
2016-04-15 10:36 ` [PATCH 04/12] MIPS: Use enums to make asm/pgtable-bits.h readable Paul Burton
2016-04-15 20:29 ` James Hogan
2016-05-11 9:38 ` Ralf Baechle
2016-04-15 10:36 ` [PATCH 06/12] MIPS: mm: Unify pte_page definition Paul Burton
2016-04-15 23:16 ` James Hogan
2016-04-15 10:36 ` [PATCH 08/12] MIPS: mm: Don't clobber $1 on XPA TLB refill Paul Burton
2016-04-15 10:36 ` [PATCH 09/12] MIPS: mm: Pass scratch register through to iPTE_SW Paul Burton
2016-04-15 22:28 ` James Hogan
2016-04-15 10:36 ` [PATCH 10/12] MIPS: mm: Be more explicit about PTE mode bit handling Paul Burton
2016-04-15 10:36 ` [PATCH 11/12] MIPS: mm: Simplify build_update_entries Paul Burton
2016-04-15 23:09 ` James Hogan
2016-04-15 10:37 ` [PATCH 12/12] MIPS: mm: Don't do MTHC0 if XPA not present Paul Burton
2016-05-10 12:44 ` [PATCH 00/12] TLB/XPA fixes & cleanups Ralf Baechle
2016-05-10 17:47 ` Florian Fainelli
2016-05-11 10:03 ` Ralf Baechle
2016-05-11 19:17 ` Florian Fainelli [this message]
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