From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 24952139D for ; Tue, 27 Jan 2026 04:48:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.17 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769489305; cv=none; b=fuete855axJimovEIG5LB2kph/iOBirf5eWaA4X8yzpqrFAfKwBYr1ZGjAqNrGxidACD9ub5pM8gf/3cer5D2kq468qSi+0o02CYgHRaIi40kIP9/QQFapEZJrgpGfM1zrLj0bbTNGdfiUguKpkwEHGtXKw5HXf+0G4YSXHUIFU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769489305; c=relaxed/simple; bh=2gtnv+9zH75Cr4xqVU80Le5SqcD4SjnW9STnjDaVWKk=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=Mh/ZCprh5TYWXA6ldqA8hSR9cLZbVIyWYq6r/aU5fW5+8ks+cWUPpHbvfelL/z5M4SQIqgQ6xmOF7cIWs4XyljHaQa551IhTiRAwvOU1z1msNa04/XSwt1R+URxpT4sM4PR/oIlnvmsT5l5YcWClwfgHv5iNkD3+X818gDBAYUw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=H8sFtfJu; arc=none smtp.client-ip=192.198.163.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="H8sFtfJu" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1769489304; x=1801025304; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=2gtnv+9zH75Cr4xqVU80Le5SqcD4SjnW9STnjDaVWKk=; b=H8sFtfJud1I8J9+Wr0Gs7EEIaEHIK8HdZlGiskHD+dNHYemCiv2Ijq/R 08OMK+6f+vxN7NAL35qJkUrCJElU+ph3+ja6SGt7Bpl5YI17NrWq3g+lI xKXZ6LEAlpPbqohnjeI83YrfZSZNOW3UBMd39c+wXAVIASco+/N0IAL+L Z791Z4AHlBEE2LFeHbztL8JXnDsroB1YxxxHPfhfjjyNE0BElfCEeJPI/ J9UGNv50sewOizlXvUkyVt2qJXW4vp829ohlw0wh1QlbN4xishLT0zbU4 xKc2562APjWoUPBpIMw+7sMjInZaX5LyYqHvw0XTN3lFTM4W/MROva9Ov g==; X-CSE-ConnectionGUID: 5EghRvvFS6SOurRsjJrAzQ== X-CSE-MsgGUID: 8C4QJaWBRA6dR0c+DLaLIg== X-IronPort-AV: E=McAfee;i="6800,10657,11683"; a="70575916" X-IronPort-AV: E=Sophos;i="6.21,256,1763452800"; d="scan'208";a="70575916" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Jan 2026 20:48:22 -0800 X-CSE-ConnectionGUID: dYU8UbLFQdit9cDOi064PA== X-CSE-MsgGUID: MTlm54zMRdSTeuy29aG58Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,256,1763452800"; d="scan'208";a="207102673" Received: from unknown (HELO [10.238.1.186]) ([10.238.1.186]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Jan 2026 20:48:18 -0800 Message-ID: <57368cb4-ddbc-4dcb-bee5-42c4c0605c55@intel.com> Date: Tue, 27 Jan 2026 12:48:16 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5] sched/clock: Avoid false sharing for sched_clock_irqtime To: K Prateek Nayak , Ingo Molnar , Peter Zijlstra , Juri Lelli , Vincent Guittot , Dietmar Eggemann , Steven Rostedt , Ben Segall , Mel Gorman , Valentin Schneider Cc: linux-kernel@vger.kernel.org, Shrikanth Hegde , Benjamin Lei , Tim Chen , Tianyou Li References: <20260127031602.1907377-1-wangyang.guo@intel.com> <95da1e97-bcfb-4a47-affc-fcec6e729d5b@amd.com> Content-Language: en-US From: "Guo, Wangyang" In-Reply-To: <95da1e97-bcfb-4a47-affc-fcec6e729d5b@amd.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 1/27/2026 11:38 AM, K Prateek Nayak wrote: > Hello Wangyang, > > On 1/27/2026 8:46 AM, Wangyang Guo wrote: >> @@ -238,6 +239,8 @@ static int __init sched_clock_init_late(void) >> >> if (__sched_clock_stable_early) >> __set_sched_clock_stable(); >> + else >> + disable_sched_clock_irqtime(); /* disable if clock unstable. */ > > nit. I think we should check for irqtime_enabled() before since > static_key_disable() would grab the cpus_read_lock() unnecessarily even > if irqtime wasn't enabled - possible with PA-RISC where a slow processor > registers the generic sched clock not eabling irqtime and then marks the > sched_clock unstable on SMP which would hit this without having irqtime > enabled. > > Same is case with "tsc=noirqtime" and then tsc turns unstable at early > boot. Added in v6 as below: https://lore.kernel.org/all/20260127044159.2254247-1-wangyang.guo@intel.com/ @@ -238,6 +239,8 @@ static int __init sched_clock_init_late(void) if (__sched_clock_stable_early) __set_sched_clock_stable(); + else if (irqtime_enabled()) + disable_sched_clock_irqtime(); /* disable if clock unstable. */ return 0; }