From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754262AbcEXCd5 (ORCPT ); Mon, 23 May 2016 22:33:57 -0400 Received: from regular2.263xmail.com ([211.157.152.4]:58026 "EHLO regular2.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754041AbcEXCd4 (ORCPT ); Mon, 23 May 2016 22:33:56 -0400 X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 X-RL-SENDER: zhengsq@rock-chips.com X-FST-TO: xxm@rock-chips.com X-SENDER-IP: 103.29.142.67 X-LOGIN-NAME: zhengsq@rock-chips.com X-UNIQUE-TAG: <312daa4a854ea87bbaa7d8ba485f69bb> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Message-ID: <5743BCF5.8030607@rock-chips.com> Date: Tue, 24 May 2016 10:31:17 +0800 From: Shunqian Zheng Reply-To: zhengsq@rock-chips.com User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.6.0 MIME-Version: 1.0 To: Catalin Marinas , Robin Murphy CC: joro@8bytes.org, heiko@sntech.de, Mark Rutland , linux-rockchip@lists.infradead.org, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Simon Subject: Re: [PATCH 4/5] iommu/rockchip: add ARM64 cache flush operation for iommu References: <1463967439-13354-1-git-send-email-zhengsq@rock-chips.com> <1463967439-13354-5-git-send-email-zhengsq@rock-chips.com> <5742DEFE.1040902@arm.com> <20160523133500.GF4892@e104818-lin.cambridge.arm.com> In-Reply-To: <20160523133500.GF4892@e104818-lin.cambridge.arm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Catalin, Robin, On 2016年05月23日 21:35, Catalin Marinas wrote: > On Mon, May 23, 2016 at 11:44:14AM +0100, Robin Murphy wrote: >> On 23/05/16 02:37, Shunqian Zheng wrote: >>> From: Simon >>> >>> Signed-off-by: Simon >>> --- >>> drivers/iommu/rockchip-iommu.c | 4 ++++ >>> 1 file changed, 4 insertions(+) >>> >>> diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c >>> index 043d18c..1741b65 100644 >>> --- a/drivers/iommu/rockchip-iommu.c >>> +++ b/drivers/iommu/rockchip-iommu.c >>> @@ -95,12 +95,16 @@ struct rk_iommu { >>> >>> static inline void rk_table_flush(u32 *va, unsigned int count) >>> { >>> +#if defined(CONFIG_ARM) >>> phys_addr_t pa_start = virt_to_phys(va); >>> phys_addr_t pa_end = virt_to_phys(va + count); >>> size_t size = pa_end - pa_start; >>> >>> __cpuc_flush_dcache_area(va, size); >>> outer_flush_range(pa_start, pa_end); >>> +#elif defined(CONFIG_ARM64) >>> + __dma_flush_range(va, va + count); >>> +#endif >> Ugh, please don't use arch-private cache maintenance functions directly from >> a driver. Allocating/mapping page tables to be read by the IOMMU is still >> DMA, so using the DMA APIs is the correct way to manage them, *especially* >> if it needs to work across multiple architectures. It's easier for us if changing the __dma_flush_range() to __flush_dcache_area() is acceptable here? Thank you, - shunqian > I fully agree, these functions should not be used in drivers.