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From: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
To: Paolo Bonzini <pbonzini@redhat.com>, Borislav Petkov <bp@alien8.de>
Cc: <rkrcmar@redhat.com>, <joro@8bytes.org>, <gleb@kernel.org>,
	<alex.williamson@redhat.com>, <kvm@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <wei@redhat.com>,
	<sherry.hurwitz@amd.com>
Subject: Re: [PART1 V5 08/13] svm: Add interrupt injection via AVIC
Date: Tue, 31 May 2016 23:02:22 -0500	[thread overview]
Message-ID: <574E5E4E.2040200@amd.com> (raw)
In-Reply-To: <5731F518.9000205@redhat.com>

Hi,

Sorry for late response on this.

On 5/10/16 09:50, Paolo Bonzini wrote:
>
>
> On 10/05/2016 11:19, Borislav Petkov wrote:
>>>> This patch introduces a new mechanism to inject interrupt using AVIC.
>>>> Since VINTR is not supported when enable AVIC, we need to inject
>> 	"... is not supported when AVIC is enabled ..."
>>
>> VINTR?
>
> The ability to request a vmexit as soon as an interrupt can be injected
> (IF=GIF=1, no interrupt window, etc.).  It's called the "VINTR intercept".
>
>> Please write those things out in the commit message for maximum
>> information transfer to the reader. :)
>
> More important, where does the APM document that VINTR is not supported
> when AVIC is enabled?  It is certainly pointless and inefficient, but
> I'm not sure where it says that it doesn't work.
>
> Paolo
>

Basically, from the APM vol2 here:

   http://developer.amd.com/wordpress/media/2012/10/24593_APM_v21.pdf

On page 115, section AVIC Enable—Virtual Interrupt Control, Bit 31:

   "... Enabling AVIC implicitly disables the V_IRQ, V_INTR_PRIO,
    V_IGN_TPR, and V_INTR_VECTOR fields in the VMCB Control Word."

Thanks,
Suravee

  reply	other threads:[~2016-06-01  4:17 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-04 19:09 [PART1 V5 00/13] KVM: x86: Introduce SVM AVIC support Suravee Suthikulpanit
2016-05-04 19:09 ` [PART1 V5 01/13] KVM: x86: Misc LAPIC changes to expose helper functions Suravee Suthikulpanit
2016-05-04 19:09 ` [PART1 V5 02/13] KVM: x86: Rename kvm_apic_get_reg to kvm_lapic_get_reg Suravee Suthikulpanit
2016-05-04 19:09 ` [PART1 V5 03/13] KVM: x86: Introducing kvm_x86_ops VM init/destroy hooks Suravee Suthikulpanit
2016-05-04 19:09 ` [PART1 V5 04/13] KVM: x86: Introducing kvm_x86_ops VCPU blocking/unblocking hooks Suravee Suthikulpanit
2016-05-04 19:09 ` [PART1 V5 05/13] KVM: split kvm_vcpu_wake_up from kvm_vcpu_kick Suravee Suthikulpanit
2016-05-04 19:09 ` [PART1 V5 06/13] svm: Introduce new AVIC VMCB registers Suravee Suthikulpanit
2016-05-04 19:09 ` [PART1 V5 07/13] KVM: x86: Detect and Initialize AVIC support Suravee Suthikulpanit
2016-05-09 10:27   ` Borislav Petkov
2016-05-10  9:14   ` Borislav Petkov
2016-05-10 14:43     ` Paolo Bonzini
2016-05-10 16:24       ` Borislav Petkov
2016-05-10 17:00         ` Paolo Bonzini
2016-05-10 17:06           ` Borislav Petkov
2016-05-04 19:09 ` [PART1 V5 08/13] svm: Add interrupt injection via AVIC Suravee Suthikulpanit
2016-05-10  9:19   ` Borislav Petkov
2016-05-10 14:50     ` Paolo Bonzini
2016-06-01  4:02       ` Suravee Suthikulpanit [this message]
2016-05-04 19:09 ` [PART1 V5 09/13] svm: Add VMEXIT handlers for AVIC Suravee Suthikulpanit
2016-05-04 19:09 ` [PART1 V5 10/13] KVM: x86: Introducing kvm_x86_ops.apicv_post_state_restore Suravee Suthikulpanit
2016-05-04 19:09 ` [PART1 V5 11/13] svm: Do not expose x2APIC when enable AVIC Suravee Suthikulpanit
2016-05-04 19:09 ` [PART1 V5 12/13] svm: Do not intercept CR8 " Suravee Suthikulpanit
2016-05-10 15:12   ` Paolo Bonzini
2016-05-04 19:09 ` [PART1 V5 13/13] svm: Manage vcpu load/unload " Suravee Suthikulpanit
2016-05-10 15:43   ` Paolo Bonzini
2016-05-17 12:09     ` Paolo Bonzini
2016-06-01 18:18       ` Suravee Suthikulpanit
2016-06-01 18:37         ` Paolo Bonzini
2016-05-10 14:57 ` [PART1 V5 00/13] KVM: x86: Introduce SVM AVIC support Paolo Bonzini

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