From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751253AbcFATuM (ORCPT ); Wed, 1 Jun 2016 15:50:12 -0400 Received: from mail-pf0-f194.google.com ([209.85.192.194]:34262 "EHLO mail-pf0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751057AbcFATuK (ORCPT ); Wed, 1 Jun 2016 15:50:10 -0400 Subject: Re: [PATCH] ARM: BCM5301X: Specify PHY of USB 2.0 in DT To: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= References: <1464808585-14996-1-git-send-email-zajec5@gmail.com> <574F35C3.6050004@gmail.com> Cc: Hauke Mehrtens , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , "open list:BROADCOM BCM5301X ARM ARCHITECTURE" , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , open list , Jon Mason From: Florian Fainelli Message-ID: <574F3C6E.4090001@gmail.com> Date: Wed, 1 Jun 2016 12:50:06 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.8.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 06/01/2016 12:35 PM, Rafał Miłecki wrote: > On 1 June 2016 at 21:21, Florian Fainelli wrote: >> On 06/01/2016 12:16 PM, Rafał Miłecki wrote: >>> Driver for Northstar USB 2.0 PHY was added in 4.7-rc1 by: >>> commit d3feb4067335 ("phy: bcm-ns-usb2: new driver for USB 2.0 PHY on >>> Northstar"). >>> It should be used to let EHCI platform driver init PHY. >>> >>> Signed-off-by: Rafał Miłecki >>> --- >>> arch/arm/boot/dts/bcm5301x.dtsi | 18 ++++++++++++++++++ >>> 1 file changed, 18 insertions(+) >>> >>> diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi >>> index 7d4d29b..9300e19 100644 >>> --- a/arch/arm/boot/dts/bcm5301x.dtsi >>> +++ b/arch/arm/boot/dts/bcm5301x.dtsi >>> @@ -140,6 +140,22 @@ >>> }; >>> }; >>> >>> + phys { >>> + compatible = "simple-bus"; >>> + ranges = <0x00000000 0x18000000 0x00100000>; >>> + #address-cells = <1>; >>> + #size-cells = <1>; >>> + >>> + usb2_phy2: usb2-phy { >>> + compatible = "brcm,ns-usb2-phy"; >>> + reg = <0x0000c000 0x1000>; >>> + reg-names = "dmu"; >>> + #phy-cells = <0>; >>> + clocks = <&genpll BCM_NSP_GENPLL_USB_PHY_REF_CLK>; >>> + clock-names = "phy-ref-clk"; >>> + }; >> >> You guys need to get everything straigthen up when it comes to busing >> and child nodes for bcm53101x.dtsi, why do we need a "simple-bus" node >> here which overlaps in part with the brcm-bus-axi node's range? > > I believed I'm making things cleaner by adding a separated node for > PHYs (in the future there will be also USB 3.0 PHY and probably a PCIe > PHY). I'm fine with placing this PHY node somewhere else if you think > it better fits there. The intent looks good, but it seems to me (and the datasheet helps here too) that extending the brcm,bus-axi node to cover a wider register range size could allow you to put the different PHYs as child nodes of that bus. That way even if the core is probed with BCMA you still have a proper of_node refefence that your driver can use. Maybe as a better immediate solution, something like the NAND controller node would be more elegant, where it only consumes its register space and not more? -- Florian