From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <linux-kernel-owner@vger.kernel.org>
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
	id S1753354AbcFBMf3 (ORCPT <rfc822;w@1wt.eu>);
	Thu, 2 Jun 2016 08:35:29 -0400
Received: from devils.ext.ti.com ([198.47.26.153]:42211 "EHLO
	devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org
	with ESMTP id S1751772AbcFBMf0 (ORCPT
	<rfc822;linux-kernel@vger.kernel.org>);
	Thu, 2 Jun 2016 08:35:26 -0400
Subject: Re: [PATCH] ARM: Keystone: Introduce Kconfig option to compile in
 typical Keystone features
To: Santosh Shilimkar <santosh.shilimkar@oracle.com>,
        Arnd Bergmann <arnd@arndb.de>, <linux-arm-kernel@lists.infradead.org>
References: <1464816714-3900-1-git-send-email-nm@ti.com>
 <3593753.UuDg5ybrvm@wuerfel>
 <cdbd2482-de98-569b-7ff0-c8963037de53@oracle.com>
CC: Russell King <linux@armlinux.org.uk>,
        Santosh Shilimkar <ssantosh@kernel.org>,
        Grygorii Strashko <grygorii.strashko@ti.com>,
        Lokesh Vutla <lokeshvutla@ti.com>, <linux-kernel@vger.kernel.org>,
        Tero Kristo <t-kristo@ti.com>, Murali Karicheri <m-karicheri2@ti.com>,
        Bill Mills <wmills@ti.com>
From: Nishanth Menon <nm@ti.com>
Message-ID: <575027E9.3070202@ti.com>
Date: Thu, 2 Jun 2016 07:34:49 -0500
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101
 Thunderbird/38.8.0
MIME-Version: 1.0
In-Reply-To: <cdbd2482-de98-569b-7ff0-c8963037de53@oracle.com>
Content-Type: text/plain; charset="windows-1252"
Content-Transfer-Encoding: 7bit
Sender: linux-kernel-owner@vger.kernel.org
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

On 06/01/2016 06:26 PM, Santosh Shilimkar wrote:
[...]
>>> Side note on LPAE:
>>> For our current device tree and u-boot, LPAE is mandatory to bootup
>>> for current Keystone boards - but this is not a SoC requirement,
>>> booting without LPAE/HIGHMEM results in non-coherent DDR accesses.
>>
>> This sounds like a regression, I thought we had this working when
>> keystone was initially merged and we got both the coherent and
>> non-coherent mode working with the same DT.
>>
> Yes and it works. The coherent memory space itself is beyond 4GB so

Hmm... True, I just tested next-20160602 with mem_lpae set to 0 in
u-boot and it seems to boot just fine.

> I don't understand a requirement of having coherent memory without
> LPAE.

Looks like a messed up description on my end, Looks like I have to
update my automated test framework to incorporate the manual steps
involved.


-- 
Regards,
Nishanth Menon