From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752796AbcFIQJq (ORCPT ); Thu, 9 Jun 2016 12:09:46 -0400 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:44055 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751168AbcFIQJo (ORCPT ); Thu, 9 Jun 2016 12:09:44 -0400 X-IBM-Helo: d23dlp03.au.ibm.com X-IBM-MailFrom: shreyas@linux.vnet.ibm.com X-IBM-RcptTo: linux-kernel@vger.kernel.org Date: Thu, 09 Jun 2016 21:39:09 +0530 From: Shreyas B Prabhu User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.1.0 MIME-Version: 1.0 To: Sam Bobroff CC: mpe@ellerman.id.au, ego@linux.vnet.ibm.com, mikey@neuling.org, maddy@linux.vnet.ibm.com, linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Subject: Re: [PATCH v5 08/11] powerpc/powernv: Add platform support for stop instruction References: <1464871141-11568-1-git-send-email-shreyas@linux.vnet.ibm.com> <1464871141-11568-9-git-send-email-shreyas@linux.vnet.ibm.com> <20160609044225.GA16550@tungsten.ozlabs.ibm.com> In-Reply-To: <20160609044225.GA16550@tungsten.ozlabs.ibm.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 16060916-0044-0000-0000-000001B2927C X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 16060916-0045-0000-0000-000004E61DCB Message-Id: <575994A5.3010205@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2016-06-09_05:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1604210000 definitions=main-1606090176 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 06/09/2016 10:12 AM, Sam Bobroff wrote: > On Thu, Jun 02, 2016 at 07:38:58AM -0500, Shreyas B. Prabhu wrote: > > ... > >> +/* Power Management - PSSCR Fields */ > > It might be nice to give the full name of the register, as below with the FPSCR. > I'll make the change while posting the next rev. Thanks, Shreyas >> +#define PSSCR_RL_MASK 0x0000000F >> +#define PSSCR_MTL_MASK 0x000000F0 >> +#define PSSCR_TR_MASK 0x00000300 >> +#define PSSCR_PSLL_MASK 0x000F0000 >> +#define PSSCR_EC 0x00100000 >> +#define PSSCR_ESL 0x00200000 >> +#define PSSCR_SD 0x00400000 >> + >> + >> /* Floating Point Status and Control Register (FPSCR) Fields */ > > Cheers, > Sam. >