From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965429AbcFMNZX (ORCPT ); Mon, 13 Jun 2016 09:25:23 -0400 Received: from foss.arm.com ([217.140.101.70]:51771 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S964968AbcFMNZV (ORCPT ); Mon, 13 Jun 2016 09:25:21 -0400 Subject: Re: [PATCH] arm64: cpuinfo: Expose MIDR_EL1 and REVIDR_EL1 to sysfs To: Will Deacon References: <1465571984-18776-1-git-send-email-suzuki.poulose@arm.com> <20160610170220.GC23223@arm.com> <575EA0DC.2080801@arm.com> <20160613123742.GD1605@arm.com> Cc: catalin.marinas@arm.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, steve.capper@linaro.org, Mark Rutland From: Suzuki K Poulose Message-ID: <575EB43D.5010108@arm.com> Date: Mon, 13 Jun 2016 14:25:17 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.8.0 MIME-Version: 1.0 In-Reply-To: <20160613123742.GD1605@arm.com> Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 13/06/16 13:37, Will Deacon wrote: > On Mon, Jun 13, 2016 at 01:02:36PM +0100, Suzuki K Poulose wrote: >> On 10/06/16 18:02, Will Deacon wrote: >>> On Fri, Jun 10, 2016 at 04:19:44PM +0100, Suzuki K Poulose wrote: >>>> From: Steve Capper >>>> >>>> It can be useful for JIT software to be aware of MIDR_EL1 and >>>> REVIDR_EL1 to ascertain the presence of any core errata that could >>>> affect codegen. >>>> >>>> This patch exposes these registers through sysfs: >>>> >>>> /sys/devices/system/cpu/cpu$ID/identification/midr >>>> /sys/devices/system/cpu/cpu$ID/identification/revidr >> >> >>>> + >>>> +#define CPUINFO_ATTR_RO(_name) \ >>>> + static ssize_t show_##_name (struct device *dev, \ >>>> + struct device_attribute *attr, char *buf) \ >>>> + { \ >>>> + struct cpuinfo_arm64 *info = &per_cpu(cpu_data, dev->id); \ >>>> + if (!cpu_present(dev->id)) \ >>>> + return -ENODEV; \ >>>> + \ >>>> + if (info->reg_midr) \ >>>> + return sprintf(buf, "0x%016x\n", info->reg_##_name); \ >>> >>> Should this be 0x%08x, as these are 32-bit registers? >> >> Yes. Will change it. As per Mark's comments, I can change them to 64bit in >> a separate patch > > No -- this is a sysfs ABI and I think we should be consistent from the > beginning. I'm fine with having them 64-bit, since Mark's comments make > sense, but a comment justifying that would be a good idea. OK. Will add a comment then. Thanks Suzuki