From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1161061AbcFPA1q (ORCPT ); Wed, 15 Jun 2016 20:27:46 -0400 Received: from mga14.intel.com ([192.55.52.115]:33767 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933127AbcFPA1o (ORCPT ); Wed, 15 Jun 2016 20:27:44 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.26,478,1459839600"; d="scan'208";a="828930894" Subject: Re: [PATCH v10 6/7] usb: pci-quirks: add Intel USB drcfg mux device To: Greg Kroah-Hartman References: <1464831449-8973-1-git-send-email-baolu.lu@linux.intel.com> <1464831449-8973-7-git-send-email-baolu.lu@linux.intel.com> <20160608044518.GB3943@kroah.com> <5757CF94.40803@linux.intel.com> <20160608154527.GA16905@kroah.com> <5758D6E2.1000402@linux.intel.com> Cc: felipe.balbi@linux.intel.com, Mathias Nyman , Lee Jones , Heikki Krogerus , Liam Girdwood , Mark Brown , linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org From: Lu Baolu Message-ID: <5761F27D.6090602@linux.intel.com> Date: Thu, 16 Jun 2016 08:27:41 +0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.5.1 MIME-Version: 1.0 In-Reply-To: <5758D6E2.1000402@linux.intel.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Greg, On 06/09/2016 10:39 AM, Lu Baolu wrote: > Hi Greg, > > On 06/08/2016 11:45 PM, Greg Kroah-Hartman wrote: >> On Wed, Jun 08, 2016 at 03:56:04PM +0800, Lu Baolu wrote: >>> Hi Greg, >>> >>> On 06/08/2016 12:45 PM, Greg Kroah-Hartman wrote: >>>> On Thu, Jun 02, 2016 at 09:37:28AM +0800, Lu Baolu wrote: >>>>> In some Intel platforms, a single usb port is shared between USB host >>>>> and device controllers. The shared port is under control of a switch >>>>> which is defined in the Intel vendor defined extended capability for >>>>> xHCI. >>>>> >>>>> This patch adds the support to detect and create the platform device >>>>> for the port mux switch. >>>> Why do you need a platform device for this? You do nothing with this >>>> device, why create it at all? >>> In this patch series, I have a generic framework for port mux devices >>> and two port mux drivers sitting on top the generic code. >>> >>> In this patch, I create a platform device for the real mux device in >>> Intel Cherry Trail or Broxton SOCs. In it's driver, I registered a mux >>> into the generic framework and handle the power management >>> things in driver's pm entries (otherwise, the system can't be waken >>> up from system suspend).:) >>> >>>> And why is it a platform device, isn't is really a PCI device? Why >>>> would you ever find a "platform" device below a PCI device? Don't abuse >>>> platform devices for things that aren't. It makes me want to delete >>>> that whole interface more and more... >>> Port mux devices are physical devices in Intel Cherry Trail and Broxton >>> SOCs. It doesn't sit on any PCIe bus. But it maps its registers in xHCI >>> space. OS kernel can enumerate it by looking up the xhci extended >>> capability list with a vendor specific capability ID. >> A physical device that maps registers into PCI space seems like a PCI >> device of some type to me :) >> >> Again, I hate platform devices for obvious reasons like this... >> > It's not PCI configure space, but xhci's io memory. XHCI spec reserves > a range in its extended capability list for vendor specific things. Intel's > platform leverages this for the port mux device register mapping. > It looks odd though. :) A gentle ping. :) This port mux is not a PCI device. It only leverages the vendor specific capability defined in xhci specification for enumeration. Best regards, Lu Baolu