From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752801AbcFVMjV (ORCPT ); Wed, 22 Jun 2016 08:39:21 -0400 Received: from mga14.intel.com ([192.55.52.115]:38272 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752686AbcFVMjS (ORCPT ); Wed, 22 Jun 2016 08:39:18 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.26,509,1459839600"; d="scan'208";a="833126072" Subject: Re: [PATCH v3 11/15] mmc: sdhci-of-arasan: Add ability to export card clock To: Douglas Anderson , ulf.hansson@linaro.org, Heiko Stuebner References: <1466445414-11974-1-git-send-email-dianders@chromium.org> <1466445414-11974-12-git-send-email-dianders@chromium.org> Cc: kishon@ti.com, robh+dt@kernel.org, shawn.lin@rock-chips.com, xzy.xu@rock-chips.com, briannorris@chromium.org, linux-rockchip@lists.infradead.org, linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, groeck@chromium.org, michal.simek@xilinx.com, soren.brinkmann@xilinx.com, geert@linux-m68k.org, wsa+renesas@sang-engineering.com, linus.walleij@linaro.org, horms+renesas@verge.net.au, andrei.pistirica@microchip.com, ludovic.desroches@atmel.com, stefan.wahren@i2se.com, yangbo.lu@freescale.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org From: Adrian Hunter Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Message-ID: <576A85FA.2000309@intel.com> Date: Wed, 22 Jun 2016 15:35:06 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.7.2 MIME-Version: 1.0 In-Reply-To: <1466445414-11974-12-git-send-email-dianders@chromium.org> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 20/06/16 20:56, Douglas Anderson wrote: > Some SD/eMMC PHYs (like the PHY from Arasan that is designed to work > with arasan,sdhci-5.1) need to know the card clock in order to function > properly. Let's add the ability to expose this clock. Any PHY that > needs to know the clock rate can add a reference and query the clock > rate. > > At the moment we register a CLK_GET_RATE_NOCACHE clock that simply > allows querying the clock. This allows us to be less intrusive with > regards to the main SDHCI driver, which has complex logic for adjusting > the SD clock. Right now we always fully power cycle the PHY when the > clock changes and that gives the PHY a good chance to query our clock. > > Signed-off-by: Douglas Anderson > Reviewed-by: Heiko Stuebner > Tested-by: Heiko Stuebner Acked-by: Adrian Hunter