From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752641AbcF2DVe (ORCPT ); Tue, 28 Jun 2016 23:21:34 -0400 Received: from mga14.intel.com ([192.55.52.115]:24117 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752449AbcF2DVd (ORCPT ); Tue, 28 Jun 2016 23:21:33 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.26,544,1459839600"; d="scan'208";a="837074770" Subject: Re: [PATCH 3/5] mmu: don't set the present bit unconditionally To: Bandan Das , kvm@vger.kernel.org References: <1467088360-10186-1-git-send-email-bsd@redhat.com> <1467088360-10186-4-git-send-email-bsd@redhat.com> Cc: pbonzini@redhat.com, linux-kernel@vger.kernel.org From: Xiao Guangrong Message-ID: <57733DD3.7040404@linux.intel.com> Date: Wed, 29 Jun 2016 11:17:39 +0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.8.0 MIME-Version: 1.0 In-Reply-To: <1467088360-10186-4-git-send-email-bsd@redhat.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 06/28/2016 12:32 PM, Bandan Das wrote: > To support execute only mappings on behalf of L1 > hypervisors, we teach set_spte() to honor L1's valid XWR > bits. This is only if host supports EPT execute only. Reuse > ACC_USER_MASK to signify if the L1 hypervisor has the R bit > set > > Signed-off-by: Bandan Das > --- > arch/x86/kvm/mmu.c | 9 +++++++-- > arch/x86/kvm/paging_tmpl.h | 2 +- > arch/x86/kvm/vmx.c | 2 +- > 3 files changed, 9 insertions(+), 4 deletions(-) > > diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c > index 875d4f7..ee2fb16 100644 > --- a/arch/x86/kvm/mmu.c > +++ b/arch/x86/kvm/mmu.c > @@ -2516,13 +2516,17 @@ static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep, > gfn_t gfn, kvm_pfn_t pfn, bool speculative, > bool can_unsync, bool host_writable) > { > - u64 spte; > + u64 spte = 0; > int ret = 0; > + struct kvm_mmu *context = &vcpu->arch.mmu; > + bool execonly = !(context->guest_rsvd_check.bad_mt_xwr & > + (1ull << VMX_EPT_EXECUTABLE_MASK)); Could we introduce a new field, say execonly, to "struct kvm_mmu"? That would make the code be more clearer.