From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752649AbcGAOsS (ORCPT ); Fri, 1 Jul 2016 10:48:18 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:19269 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751280AbcGAOsR (ORCPT ); Fri, 1 Jul 2016 10:48:17 -0400 To: Arnd Bergmann , Olof Johansson , Kevin Hilman , CC: "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , Peter Griffin , Lee Jones , "open list:ARM/STI ARCHITECTURE" From: Patrice Chotard Subject: [GIT PULL] STi SoC changes for v4.8 Message-ID: <57768292.8070901@st.com> Date: Fri, 1 Jul 2016 16:47:46 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.8.0 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.48.1.66] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2016-07-01_04:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Olof, Arnd and Kevin, Please consider this first round of STi SoC updates for v4.8: The following changes since commit 4c2e07c6a29e0129e975727b9f57eede813eea85: Linux 4.7-rc5 (2016-06-26 17:52:03 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti.git sti-soc_for_v4.8 for you to fetch changes up to 55aa35180c57d82f3db23e5aabce97acb0d36681: ARM: sti: Implement dummy L2 cache's write_sec (2016-07-01 16:23:44 +0200) ---------------------------------------------------------------- Highlights: ----------- _ add a dummy L2 cache's write_sec callback as in non secure mode execution, we can't get access to L2 cache secure registers _ cosmetics change, in case of dump_stack, update the hardware name with a more genericfor the STi SoCs family ---------------------------------------------------------------- Patrice Chotard (1): ARM: sti: Implement dummy L2 cache's write_sec Peter Griffin (1): ARM: STi: Update machine _namestr to be more generic. arch/arm/mach-sti/board-dt.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-)