From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754051AbcGEArP (ORCPT ); Mon, 4 Jul 2016 20:47:15 -0400 Received: from mail-pf0-f194.google.com ([209.85.192.194]:33787 "EHLO mail-pf0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751636AbcGEArK (ORCPT ); Mon, 4 Jul 2016 20:47:10 -0400 Subject: Re: [PATCH 3/4] perf tool: Fix build when sysconf doesn't support cache line size To: Arnaldo Carvalho de Melo References: <1467349955-1135-1-git-send-email-cphlipot0@gmail.com> <1467349955-1135-4-git-send-email-cphlipot0@gmail.com> <20160704224832.GZ5324@kernel.org> <577AFD08.7090303@gmail.com> <20160705002641.GA5324@kernel.org> Cc: peterz@infradead.org, mingo@redhat.com, linux-kernel@vger.kernel.org From: Chris Phlipot Message-ID: <577B0390.60602@gmail.com> Date: Mon, 4 Jul 2016 17:47:12 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.8.0 MIME-Version: 1.0 In-Reply-To: <20160705002641.GA5324@kernel.org> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 07/04/2016 05:26 PM, Arnaldo Carvalho de Melo wrote: > Em Mon, Jul 04, 2016 at 05:19:20PM -0700, Chris Phlipot escreveu: >> >> >> On 07/04/2016 03:48 PM, Arnaldo Carvalho de Melo wrote: >>> Em Thu, Jun 30, 2016 at 10:12:34PM -0700, Chris Phlipot escreveu: >>>> Enable perf to build on libc implementations where sysconf() doesn't >>>> support _SC_LEVEL1_DCACHE_LINESIZE as a parameter. >>>> >>>> For example, the Bionic implementation does not support this as a >>>> paremter. Older versions of Bionic will throw an error when this is passed >>>> in as a parameter, and more recent versions will just return 0 as the >>>> cache line size. >>>> >>>> Signed-off-by: Chris Phlipot >>>> --- >>>> tools/perf/perf.c | 4 ++++ >>>> 1 file changed, 4 insertions(+) >>>> >>>> diff --git a/tools/perf/perf.c b/tools/perf/perf.c >>>> index 8f21922..113ca5b 100644 >>>> --- a/tools/perf/perf.c >>>> +++ b/tools/perf/perf.c >>>> @@ -509,7 +509,11 @@ int main(int argc, const char **argv) >>>> >>>> /* The page_size is placed in util object. */ >>>> page_size = sysconf(_SC_PAGE_SIZE); >>>> +#ifdef _SC_LEVEL1_DCACHE_LINESIZE >>>> cacheline_size = sysconf(_SC_LEVEL1_DCACHE_LINESIZE); >>>> +#else >>>> + cacheline_size = 0; >>>> +#endif >>> >>> Couldn't we instead fallback to: >>> >>> sysfs__read_int("devices/system/cpu/cpu0/cache/index0/coherency_line_size", &cacheline_size) >>> >>> ? >> >> I agree that in general this would be a better fallback, but in all Android >> images I have tested so far, "devices/system/cpu/cpu0/cache" does not exist. >> I know not know of a good way to retrieve cache line size in this case. >> >> I would be ok with attempting to get cacheline size using using the >> following methods, unless you have other ideas: >> >> 1. attempt to use sysconf(_SC_LEVEL1_DCACHE_LINESIZE) >> 2. attempt to use >> sysfs__read_int("devices/system/cpu/cpu0/cache/index0/coherency_line_size", >> &cacheline_size) >> 3. set to zero if both of the above fail. > > Ok, but perhaps we should have some sort of warning in places using > this? > > - Arnaldo Such as printing a warning when cacheline_size is set to zero, or simply adding comments to the code in areas where cacheline_size is used? -Chris > >> >>> >>>> if (sysctl__read_int("kernel/perf_event_max_stack", &value) == 0) >>>> sysctl_perf_event_max_stack = value; >>>> -- >>>> 2.7.4