From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754182AbcGEB32 (ORCPT ); Mon, 4 Jul 2016 21:29:28 -0400 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:49234 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751240AbcGEB31 (ORCPT ); Mon, 4 Jul 2016 21:29:27 -0400 X-IBM-Helo: d03dlp02.boulder.ibm.com X-IBM-MailFrom: ravi.bangoria@linux.vnet.ibm.com Subject: Re: [PATCH v3 3/4] perf annotate: add powerpc support To: Michael Ellerman , linux-kernel@vger.kernel.org, acme@kernel.org, linuxppc-dev@lists.ozlabs.org References: <1467267262-4589-1-git-send-email-ravi.bangoria@linux.vnet.ibm.com> <1467267262-4589-4-git-send-email-ravi.bangoria@linux.vnet.ibm.com> <1467267714.7296.6.camel@ellerman.id.au> <57762D2A.9040103@linux.vnet.ibm.com> Cc: anton@ozlabs.org, ananth@in.ibm.com, dja@axtens.net, naveen.n.rao@linux.vnet.ibm.com, David.Laight@ACULAB.COM, Ravi Bangoria From: Ravi Bangoria Date: Tue, 5 Jul 2016 06:58:55 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.5.1 MIME-Version: 1.0 In-Reply-To: <57762D2A.9040103@linux.vnet.ibm.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Content-Scanned: Fidelis XPS MAILER x-cbid: 16070501-8235-0000-0000-000008B9A12E X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 16070501-8236-0000-0000-000032D1F641 Message-Id: <577B0D57.3080702@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2016-07-05_01:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1604210000 definitions=main-1607050013 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Michael, On Friday 01 July 2016 02:13 PM, Ravi Bangoria wrote: > Thanks Michael for your suggestion. > > On Thursday 30 June 2016 11:51 AM, Michael Ellerman wrote: >> On Thu, 2016-06-30 at 11:44 +0530, Ravi Bangoria wrote: >>> diff --git a/tools/perf/util/annotate.c b/tools/perf/util/annotate.c >>> index 36a5825..b87eac7 100644 >>> --- a/tools/perf/util/annotate.c >>> +++ b/tools/perf/util/annotate.c >>> @@ -476,6 +481,125 @@ static int ins__cmp(const void *a, const void *b) >> ... >>> + >>> +static struct ins *ins__find_powerpc(const char *name) >>> +{ >>> + int i; >>> + struct ins *ins; >>> + struct ins_ops *ops; >>> + static struct instructions_powerpc head; >>> + static bool list_initialized; >>> + >>> + /* >>> + * - Interested only if instruction starts with 'b'. >>> + * - Few start with 'b', but aren't branch instructions. >>> + * - Let's also ignore instructions involving 'ctr' and >>> + * 'tar' since target branch addresses for those can't >>> + * be determined statically. >>> + */ >>> + if (name[0] != 'b' || >>> + !strncmp(name, "bcd", 3) || >>> + !strncmp(name, "brinc", 5) || >>> + !strncmp(name, "bper", 4) || >>> + strstr(name, "ctr") || >>> + strstr(name, "tar")) >>> + return NULL; >> It would be good if 'bctr' was at least recognised as a branch, even >> if we >> can't determine the target. They are very common. > > We can not show arrow for this since we don't know the target location. > can you please suggest how you intends perf to display bctr? > > bctr can be classified into two variants -- 'bctr' and 'bctrl'. > > 'bctr' will be considered as jump instruction but jump__parse() won't > be able to find any target location and hence it will set target to > UINT64_MAX which transform 'bctr' to 'bctr UINT64_MAX'. This > looks misleading. > > bctrl will be considered as call instruction but call_parse() won't > be able to find any target function and hence it won't show any > navigation arrow for this instruction. Which is same as filter it > beforehand. > >> It doesn't look like we have the opcode handy here? Could we get it >> somehow? >> That would make this a *lot* more robust. > > objdump prints machine code, but I don't know how difficult that would > be to parse to get opcode. Perf uses --no-show-raw with objdump and hence objdump output does not show opcodes. So change in current objdump output may requires changes in current parsing logic. Additionally I need to change tui as well to show opcodes. This looks quite more work. And this patchset is about enabling annotate for cross arch. So if you really need opcode with perf anotate, can we do it separately? Please let me know your thoughts. -Ravi > > -Ravi > >> cheers >> >