From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933125AbcGERNo (ORCPT ); Tue, 5 Jul 2016 13:13:44 -0400 Received: from foss.arm.com ([217.140.101.70]:54258 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752862AbcGERNm (ORCPT ); Tue, 5 Jul 2016 13:13:42 -0400 Subject: Re: [RFC PATCH v1] irqchip: add support for SMP irq router To: Sebastian Frias , Jason Cooper References: <577542D1.4070307@laposte.net> <577A5260.3070001@free.fr> <577BA854.6090503@laposte.net> <20160705144151.GE3348@io.lakedaemon.net> <577BCFD2.8060203@laposte.net> <20160705155306.GG3348@io.lakedaemon.net> <577BE288.70200@laposte.net> <577BE4D8.2040601@arm.com> <577BE75B.4070109@laposte.net> Cc: Mason , LKML , Thomas Gleixner From: Marc Zyngier X-Enigmail-Draft-Status: N1110 Organization: ARM Ltd Message-ID: <577BEABE.2010204@arm.com> Date: Tue, 5 Jul 2016 18:13:34 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Icedove/38.7.0 MIME-Version: 1.0 In-Reply-To: <577BE75B.4070109@laposte.net> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 05/07/16 17:59, Sebastian Frias wrote: > Hi Marc, > > On 07/05/2016 06:48 PM, Marc Zyngier wrote: >>> I already did something like that, you can see it here: >>> >>> https://marc.info/?l=linux-kernel&m=146592235919308&w=2 >>> >>> the problem with that code is that it cannot handle more than 24 IRQs (the >>> number of outputs of the router), because they are not being shared. >>> >>> Maybe I need a sort of hybrid approach by reintroducing part of >>> "irq-crossbar.c" code to replace the irq domain layout that is currently >>> being done using DT properties ? >>> >>> However, I have not seen any examples of how to describe, using the DT, >>> an association between a device HW irq, and the GIC hwirq where it goes to, >>> nor how to express in the DT that multiple devices should share a given GIC >>> hwirq. >>> Basically, when a device requests the IRQ specified in its DT, I need: >>> - to know which GIC hwirq line should I route it to (or the GIC to tell >>> me which one it expects) >> >> You really don't need to describe this. The configuration that is >> applied to your router in entirely under software control, > > With "entirely under software control" do you mean this driver's code? Yes. > >> and none of >> that should appear in the DT. You could decide to mux all the interrupts >> to a single one, or decide that the 23 first interrupts you discover get >> their own private line to the GIC and that everything else is muxed. >> >> So given that this is completely defined by software, it has no place in >> DT. > > I think I'm missing something, what is the difference between the domains > described by nodes in the DT for irq-tango.c (arch/arm/boot/dts/tango4-common.dtsi) > and the DT from my RFC? The fundamental difference is that with your new fancy controller, you can decide what is going where, while the previous one is completely set in stone (the output line is a direct function of the input line). > > Alternatively, the previous DT (arch/arm/boot/dts/tango4-common.dtsi) allowed > IRQ sharing to be specified in the DT, is that wrong? > >> There may not be an example of such an interrupt controller in the >> tree, but this doesn't look too hard to implement. > > Well, if you the domains should not be described in the DT and that they should > be somehow hardcoded into the drivers' code, it should not be hard indeed. Hardcoded? No way. You simply implement a route allocator in your driver, assigning them as needed. And yes, if you have more than 24 interrupts, they get muxed. M. -- Jazz is not dead. It just smells funny...