From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758050AbcGKHi7 (ORCPT ); Mon, 11 Jul 2016 03:38:59 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:44721 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758020AbcGKHi6 (ORCPT ); Mon, 11 Jul 2016 03:38:58 -0400 Subject: Re: [GIT PULL v2] STi SoC changes for v4.8 To: Arnd Bergmann References: <577E01B5.2030206@st.com> <11314287.lfBJrM5UFT@wuerfel> CC: Olof Johansson , Kevin Hilman , , "open list:ARM/STI ARCHITECTURE" , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" From: Patrice Chotard Message-ID: <57834CF0.9090508@st.com> Date: Mon, 11 Jul 2016 09:38:24 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.8.0 MIME-Version: 1.0 In-Reply-To: <11314287.lfBJrM5UFT@wuerfel> Content-Type: text/plain; charset="windows-1252"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.48.1.66] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2016-07-11_03:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 07/07/2016 03:23 PM, Arnd Bergmann wrote: > On Thursday, July 7, 2016 9:16:05 AM CEST Patrice Chotard wrote: >> Highlights: >> ----------- >> - Add a dummy L2 cache's write_sec callback as in non secure mode execution, >> we can't get access to L2 cache secure registers >> - Cosmetics change, in case of dump_stack, update the hardware name with a >> more generic for the STi SoCs family >> > This is also based on -rc5, please send a third version rebased to -rc3 or > earlier. Hi Arnd V3 will be send shortly Thanks Patrice > > Arnd