From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933696AbcGKIrz (ORCPT ); Mon, 11 Jul 2016 04:47:55 -0400 Received: from foss.arm.com ([217.140.101.70]:51394 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757833AbcGKIrx (ORCPT ); Mon, 11 Jul 2016 04:47:53 -0400 Subject: Re: PCIe MSI address is not written at pci_enable_msi_range call To: Bharat Kumar Gogada , "linux-pci@vger.kernel.org" , "linux-kernel@vger.kernel.org" References: <8520D5D51A55D047800579B094147198258B80DE@XAP-PVEXMBX01.xlnx.xilinx.com> Cc: Arnd Bergmann , Bjorn Helgaas From: Marc Zyngier X-Enigmail-Draft-Status: N1110 Organization: ARM Ltd Message-ID: <57835D35.1000901@arm.com> Date: Mon, 11 Jul 2016 09:47:49 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Icedove/38.7.0 MIME-Version: 1.0 In-Reply-To: <8520D5D51A55D047800579B094147198258B80DE@XAP-PVEXMBX01.xlnx.xilinx.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 11/07/16 03:32, Bharat Kumar Gogada wrote: > Hi, > > I have a query. > I see that when we use PCI_MSI_IRQ_DOMAIN to handle MSI's, MSI address is not being > written in to end point's PCI_MSI_ADDRESS_LO/HI at the call pci_enable_msi_range. > > Instead it is being written at the time end point requests irq. > > Can any one tell the reason why is it handled in this manner ? Because there is no real need to do it earlier, and in some case you cannot allocate MSIs at that stage. pci_enable_msi_range only works out how many vectors are required. At least one MSI controller (GICv3 ITS) needs to know how many vectors are required before they can be provided to the end-point. Do you see any issue with this? Thanks, M. -- Jazz is not dead. It just smells funny...