From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753157AbcGSINM (ORCPT ); Tue, 19 Jul 2016 04:13:12 -0400 Received: from mailout3.samsung.com ([203.254.224.33]:32818 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752539AbcGSINF (ORCPT ); Tue, 19 Jul 2016 04:13:05 -0400 X-AuditID: cbfee68f-f79476d000001429-b4-578de10db349 Message-id: <578DE10D.3020401@samsung.com> Date: Tue, 19 Jul 2016 17:13:01 +0900 From: Jaehoon Chung User-Agent: Mozilla/5.0 (X11; Linux i686; rv:31.0) Gecko/20100101 Thunderbird/31.6.0 MIME-version: 1.0 To: Jin Guojun , ulf.hansson@linaro.org, Adrian Hunter , arnd@arndb.de, rmk+kernel@arm.linux.org.uk, shawn.lin@rock-chips.com, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, xuwei5@hisilicon.com, robh+dt@kernel.org, ijc+devicetree@hellion.org.uk, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linuxarm@huawei.com, suzhuangluan@hisilicon.com, kongfei@hisilicon.com, CPGS Subject: Re: [PATCH 1/2] Support SD UHS for hikey-mainline-rebase References: <1468914713-63347-1-git-send-email-kid.jin@hisilicon.com> In-reply-to: <1468914713-63347-1-git-send-email-kid.jin@hisilicon.com> Content-type: text/plain; charset=windows-1252 Content-transfer-encoding: 7bit X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrOIsWRmVeSWpSXmKPExsWyRsSkQJf3YW+4wec2U4uTT9awWfyddIzd 4uUhTYv5R86xWpx7tZLR4s/lBYwWG7//Y7bY9Pgaq8XlXXPYLI7872e0OLzxDJPF5g8v2Sxa 9x5ht7jzZD2rRfdPO4vja8Mtnhydwuwg6NHS3MPm8fvXJEaPlcu/sHk8nruR3aPlyFtWj8V7 XjJ5bFrVyeZx59oeNo/NS+o9/s7az+LRt2UVo8fnTXIBPFFcNimpOZllqUX6dglcGT/OrmQv uCVa8fP3E7YGxj2CXYycHBICJhL/D/xhh7DFJC7cW88GYgsJrGCUaNxdCFNz6ddsoDgXUHwW o8S+FbsZIYoeMEqsXaUOYvMKaEms3TYJrJlFQFWiq/slM4jNJqAjsf3bcSYQW1QgTOLBur2s EPWCEj8m32MBGSoi8IBZYveExWBXCAs4SjT8e80CsW02o8SF35fAOjgF3CTW3JgFtJmDg1lA T+L+RS2QMLOAvMTmNW+ZQeolBI5wSGy8OhPqCgGJb5MPsYDUSwjISmw6wAzxjaTEwRU3WCYw is5CcscshKmzkExdwMi8ilE0tSC5oDgpvchYrzgxt7g0L10vOT93EyMw/k//e9a/g/HuAetD jAIcjEo8vBun94YLsSaWFVfmHmI0BTpiIrOUaHI+MMnklcQbGpsZWZiamBobmVuaKYnzLpT6 GSwkkJ5YkpqdmlqQWhRfVJqTWnyIkYmDU6qBcamDuu/ay88cn4jvmVh9f9uerD+rNjQkRAeX 3GHjTv76IMn9U/n+R8wiO3afWHJpfcxs/mWyL+UeezoFW/8qS99s9/EOz8SJv6//kmUWOhFf or4mZ65F2Z9/SeEPJ5Z23zN73P/CaIPicYn8YqF5v6x15Gd6FJ/ki5Rsrrm4vYQpsu6h5QN7 VyWW4oxEQy3mouJEAM7o1cv6AgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrKKsWRmVeSWpSXmKPExsVy+t9jQV3eh73hBpv/6VicfLKGzeLvpGPs Fi8PaVrMP3KO1eLcq5WMFn8uL2C02Pj9H7PFpsfXWC0u75rDZnHkfz+jxeGNZ5gsNn94yWbR uvcIu8WdJ+tZLbp/2lkcXxtu8eToFGYHQY+W5h42j9+/JjF6rFz+hc3j8dyN7B4tR96yeize 85LJY9OqTjaPO9f2sHlsXlLv8XfWfhaPvi2rGD0+b5IL4IlqYLTJSE1MSS1SSM1Lzk/JzEu3 VfIOjneONzUzMNQ1tLQwV1LIS8xNtVVy8QnQdcvMAXpMSaEsMacUKBSQWFyspG+HaUJoiJuu BUxjhK5vSBBcj5EBGkhYw5jx4+xK9oJbohU/fz9ha2DcI9jFyMkhIWAicenXbDYIW0ziwr31 QDYXh5DALEaJfSt2M4IkhAQeMEqsXaUOYvMKaEms3TYJrIFFQFWiq/slM4jNJqAjsf3bcSYQ W1QgTOLBur2sEPWCEj8m32MBGSoi8IBZYveExewgCWEBR4mGf69ZILbNZpS48PsSWAengJvE mhuzgDZzcDAL6Encv6gFEmYWkJfYvOYt8wRG/llI5s5CqJqFpGoBI/MqRonUguSC4qT0XKO8 1HK94sTc4tK8dL3k/NxNjOAk80x6B+PhXe6HGAU4GJV4eHfM6w0XYk0sK67MPcQowcGsJMK7 5R5QiDclsbIqtSg/vqg0J7X4EKMp0OMTmaVEk/OBCTCvJN7Q2MTMyNLI3NDCyNhcSZz38f91 YUIC6YklqdmpqQWpRTB9TBycUg2MWd2eH0tXnrvYfjPW+1/h/qZPv89tMTTQ7TduzQt/6dXx RUKC9bn9xM4w+b//Cg1b+r7f/ujsIn/s0KFDuhL79i4XXncg83jonE2CGo/2CS+9duXGN7f8 kP6DfvEWB5K23fuXtc7jvBd/xxOVTdIT/Z6n1Z6ouCjzMeT59I2lThcjb7b+/7G+RYmlOCPR UIu5qDgRANsSF89IAwAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Removed the unnecessary CC'd. On 07/19/2016 04:51 PM, Jin Guojun wrote: > From: j00226943 What is j00226943? When you send the patch for dw_mmc controller, plz use the prefix "mmc: dw_mmc: ". > > Two more changes: > > Before we send cmd,we need to set CMD bit29 to > 1 so that CMD and DATA sent to card through the HOLD Register, > This is the explication in synosys host:To meet the relatively > high Input Hold Time requirement for SDR12, SDR25, and other MMC > speed modes, you should program bit[29]use_hold_Reg of the CMD > register to 1'b1; the output data is then registered again in the > cclk_in_drv domain by using the Hold Register as shown in Path B > of Figure 10-8. However, for the higher speed modes of SDR104, SDR50 > and DDR50, you can meet the much smaller Input Hold Time requirement > of 0.8ns by bypassing the Hold Register (Path A in Figure 10-8, > programming CMD.use_hold_reg = 1'b0) and then adding delay elements > on the output path as indicated > > We have no tuning function in our drivers,so we must do the > Function piling when we init UHS card. Sorry..this patch is NACK. SDMMC_CMD_USE_HOLD_REG is already used by default in dw_mmc.c Which kernel version did you use? > > Signed-off-by: Jin Guojun > --- > drivers/mmc/host/dw_mmc-k3.c | 6 ++++++ > drivers/mmc/host/dw_mmc.c | 2 ++ > 2 files changed, 8 insertions(+) > > diff --git a/drivers/mmc/host/dw_mmc-k3.c b/drivers/mmc/host/dw_mmc-k3.c > index 63c2e2e..2cbfcc7 100644 > --- a/drivers/mmc/host/dw_mmc-k3.c > +++ b/drivers/mmc/host/dw_mmc-k3.c > @@ -125,10 +125,16 @@ static void dw_mci_hi6220_set_ios(struct dw_mci *host, struct mmc_ios *ios) > host->bus_hz = clk_get_rate(host->biu_clk); > } > > +static void dw_mci_hi6220_prepare_command(struct dw_mci *host, u32 *cmdr) > +{ > + *cmdr |= SDMMC_CMD_USE_HOLD_REG; > +} > + > static const struct dw_mci_drv_data hi6220_data = { > .switch_voltage = dw_mci_hi6220_switch_voltage, > .set_ios = dw_mci_hi6220_set_ios, > .parse_dt = dw_mci_hi6220_parse_dt, > + .prepare_command = dw_mci_hi6220_prepare_command, > }; There is no "prepare_command" hooks. Best Regards, Jaehoon Chung > > static const struct of_device_id dw_mci_k3_match[] = { > diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c > index 9dd1bd3..047e116 100644 > --- a/drivers/mmc/host/dw_mmc.c > +++ b/drivers/mmc/host/dw_mmc.c > @@ -1564,6 +1564,8 @@ static int dw_mci_execute_tuning(struct mmc_host *mmc, u32 opcode) > > if (drv_data && drv_data->execute_tuning) > err = drv_data->execute_tuning(slot, opcode); > + else > + err = 0; > return err; > } > >