From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751989AbcHAHmT (ORCPT ); Mon, 1 Aug 2016 03:42:19 -0400 Received: from mailout3.samsung.com ([203.254.224.33]:32775 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750707AbcHAHly (ORCPT ); Mon, 1 Aug 2016 03:41:54 -0400 MIME-version: 1.0 Content-type: text/plain; charset=utf-8 X-AuditID: cbfee68e-f79cb6d000006cfe-39-579efcbfb3ef Content-transfer-encoding: 8BIT Message-id: <579EFCBE.4080600@samsung.com> Date: Mon, 01 Aug 2016 16:39:42 +0900 From: Chanwoo Choi User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.6.0 To: Lin Huang , heiko@sntech.de Cc: tixy@linaro.org, dbasehore@chromium.org, airlied@linux.ie, mturquette@baylibre.com, typ@rock-chips.com, sboyd@codeaurora.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, dianders@chromium.org, linux-rockchip@lists.infradead.org, kyungmin.park@samsung.com, myungjoo.ham@samsung.com, linux-arm-kernel@lists.infradead.org, mark.yao@rock-chips.com Subject: Re: [PATCH v4 0/7] rk3399 support ddr frequency scaling References: <1469779021-10426-1-git-send-email-hl@rock-chips.com> In-reply-to: <1469779021-10426-1-git-send-email-hl@rock-chips.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrBIsWRmVeSWpSXmKPExsWyRsSkUHf/n3nhBpt/iVr0njvJZPFq8x42 i7PLDrJZXPn6ns3i/6PXrBY/Npxitjjb9IbdYtPja6wWl3fNYbP49OA/s8WOKQeYLC6ecrW4 3biCzeLHmW4Wi4Xz77NbzF5d5yDg8f5GK7vH7IaLLB6X+3qZPO5c28Pmsf3bA1aP+93HmTw2 L6n3+DtrP4tH35ZVjB7br81j9vi8SS6AO4rLJiU1J7MstUjfLoErY+W6c0wFfyUqevdeY2lg /CzYxcjJISFgIvH2w052CFtM4sK99WxdjFwcQgIrGCUu9y9kgil6tmgRK0RiFqNEx53TYAle AUGJH5PvsXQxcnAwC8hLHLmUDWGqS0yZkgtR/oBRYu/WGawQ5VoSW3cvZgKpYRFQlVi0KA4k zAYU3v/iBhtIWFQgQqL7RCVIWETASOLsl/lMIGOYBX4wSXzYuZoNJCEs4CCxeMFcJoj50xkl Vi/7wAiS4BRwkpjz8zBYQkLgCIdE++m1YItZBAQkvk0+BHanhICsxKYDzBB/SUocXHGDZQKj 2Cwk38xC+GYWwjcLGJlXMYqmFiQXFCelFxnpFSfmFpfmpesl5+duYgQmgNP/nvXtYLx5wPoQ owAHoxIPLwfTvHAh1sSy4srcQ4ymQDdMZJYSTc4Hppm8knhDYzMjC1MTU2Mjc0szJXHeBKmf wUIC6YklqdmpqQWpRfFFpTmpxYcYmTg4pRoY+TdVF5oG3J5S8OTnq/j164Uqd2Ye0I1bV8mb siHmWXzW40sKkQ/WrBF+rX/2myRn9tM6b0ajCDaHmvMd5UpxoSo/WCwtOWTV/5+WPMp6WP6q odjrLZnbDu7on2KxdJb9ftHFYlZG+6c17fnd1fzZ5kH0rq0xOwP3pSxSnq4uYPNi8Rpm/yP2 SizFGYmGWsxFxYkA4DVDo/sCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrKKsWRmVeSWpSXmKPExsVy+t9jQd39f+aFG0xdyG/Re+4kk8WrzXvY LM4uO8hmceXrezaL/49es1r82HCK2eJs0xt2i02Pr7FaXN41h83i04P/zBY7phxgsrh4ytXi duMKNosfZ7pZLBbOv89uMXt1nYOAx/sbrewesxsusnhc7utl8rhzbQ+bx/ZvD1g97ncfZ/LY vKTe4++s/SwefVtWMXpsvzaP2ePzJrkA7qgGRpuM1MSU1CKF1Lzk/JTMvHRbJe/geOd4UzMD Q11DSwtzJYW8xNxUWyUXnwBdt8wcoH+UFMoSc0qBQgGJxcVK+naYJoSGuOlawDRG6PqGBMH1 GBmggYQ1jBkr151jKvgrUdG79xpLA+NnwS5GTg4JAROJZ4sWsULYYhIX7q1n62Lk4hASmMUo 0XHnNBNIgldAUOLH5HssXYwcHMwC8hJHLmVDmOoSU6bkQpQ/YJTYu3UGK0S5lsTW3YuZQGpY BFQlFi2KAwmzAYX3v7jBBhIWFYiQ6D5RCRIWETCSOPtlPhPIGGaBH0wSH3auZgNJCAs4SCxe MJcJYv50RonVyz4wgiQ4BZwk5vw8zDSBEehIhOtmIVw3C+G6BYzMqxglUguSC4qT0nON8lLL 9YoTc4tL89L1kvNzNzGCk8wz6R2Mh3e5H2IU4GBU4uHVkJsXLsSaWFZcmXuIUYKDWUmEd/FP oBBvSmJlVWpRfnxRaU5q8SFGU6D3JjJLiSbnAxNgXkm8obGJmZGlkbmhhZGxuZI47+P/68KE BNITS1KzU1MLUotg+pg4OKUaGOUyuzdOvqx9ympJ9+0/RYcMttewrj1otln5VvaM7pOF3Odl Z85enDT965YNs5svT2E3q9XPM0zpMsv8ZMpx6WDmobKGQ7G8Ue++eN/Y/+5AwC3lPRM0tj3v 6/z+XO3nnC0zsyJvXxL6V5KQ+aD0dqCjwNE3bzkm+Akxdv7eeGDaVPtXdwpaXD4osRRnJBpq MRcVJwIAYsYHQkgDAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Lin, On 2016년 07월 29일 16:56, Lin Huang wrote: > rk3399 platform have dfi controller can monitor ddr load, > and dcf controller to handle ddr register so we can get the > right ddr frequency and make ddr controller happy work(which > will implement in bl31). So we do ddr frequency scaling with > following flow: > > kernel bl31 > > monitor ddr load > | > | > get_target_rate > | > | pass rate to bl31 > clk_set_rate(ddr) --------------------->run dcf flow > | | > | | > wait dcf interrupt<-------------------trigger dcf interrupt > | > | > return > > Lin Huang (6): > clk: rockchip: add new clock-type for the ddrclk > clk: rockchip: rk3399: add SCLK_DDRCLK ID for ddrc > clk: rockchip: rk3399: add ddrc clock support > PM / devfreq: event: support rockchip dfi controller > PM / devfreq: rockchip: add devfreq driver for rk3399 dmc > drm/rockchip: Add dmc notifier in vop driver > > > Heiko Stübner (1): > clk: rockchip: add clock flag parameter when register pll > > Lin Huang (6): > clk: rockchip: add new clock-type for the ddrclk > clk: rockchip: rk3399: add SCLK_DDRCLK ID for ddrc > clk: rockchip: rk3399: add ddrc clock support > PM / devfreq: event: support rockchip dfi controller > PM / devfreq: rockchip: add devfreq driver for rk3399 dmc > drm/rockchip: Add dmc notifier in vop driver The cover-letter includes the duplicate list of patches. Also, I want to test the build test. but, When I apply these patches, merge conflict happen. Could you give the information about base git repository? Regards, Chanwoo Choi > drivers/clk/rockchip/Makefile | 1 + > drivers/clk/rockchip/clk-ddr.c | 146 +++++++++ > drivers/clk/rockchip/clk-pll.c | 4 +- > drivers/clk/rockchip/clk-rk3399.c | 19 ++ > drivers/clk/rockchip/clk.c | 11 +- > drivers/clk/rockchip/clk.h | 29 +- > drivers/devfreq/Kconfig | 1 + > drivers/devfreq/Makefile | 1 + > drivers/devfreq/event/Kconfig | 7 + > drivers/devfreq/event/Makefile | 1 + > drivers/devfreq/event/rockchip-dfi.c | 253 +++++++++++++++ > drivers/devfreq/rockchip/Kconfig | 8 + > drivers/devfreq/rockchip/Makefile | 1 + > drivers/devfreq/rockchip/rk3399_dmc.c | 473 ++++++++++++++++++++++++++++ > drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 124 +++++++- > include/dt-bindings/clock/rk3399-cru.h | 1 + > include/soc/rockchip/rockchip_sip.h | 27 ++ > 17 files changed, 1098 insertions(+), 9 deletions(-) > create mode 100644 drivers/clk/rockchip/clk-ddr.c > create mode 100644 drivers/devfreq/event/rockchip-dfi.c > create mode 100644 drivers/devfreq/rockchip/Kconfig > create mode 100644 drivers/devfreq/rockchip/Makefile > create mode 100644 drivers/devfreq/rockchip/rk3399_dmc.c > create mode 100644 include/soc/rockchip/rockchip_sip.h >