From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754705AbcHSKkN (ORCPT ); Fri, 19 Aug 2016 06:40:13 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:36839 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752581AbcHSKkM (ORCPT ); Fri, 19 Aug 2016 06:40:12 -0400 X-IBM-Helo: d03dlp01.boulder.ibm.com X-IBM-MailFrom: ravi.bangoria@linux.vnet.ibm.com Subject: Re: [PATCH v5 2/7] perf annotate: Add cross arch annotate support To: Russell King - ARM Linux References: <1471584546-11080-1-git-send-email-ravi.bangoria@linux.vnet.ibm.com> <1471584546-11080-3-git-send-email-ravi.bangoria@linux.vnet.ibm.com> <20160819075034.GG1041@n2100.armlinux.org.uk> Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, acme@kernel.org, peterz@infradead.org, mingo@redhat.com, alexander.shishkin@linux.intel.com, treeze.taeung@gmail.com, naveen.n.rao@linux.vnet.ibm.com, markus@trippelsdorf.de, chris.ryder@arm.com, pawel.moll@arm.com, mhiramat@kernel.org, jolsa@kernel.org, mpe@ellerman.id.au, hemant@linux.vnet.ibm.com, namhyung@kernel.org, Ravi Bangoria From: Ravi Bangoria Date: Fri, 19 Aug 2016 16:09:51 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.5.1 MIME-Version: 1.0 In-Reply-To: <20160819075034.GG1041@n2100.armlinux.org.uk> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Content-Scanned: Fidelis XPS MAILER x-cbid: 16081910-0012-0000-0000-00001070300F X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00005615; HX=3.00000240; KW=3.00000007; PH=3.00000004; SC=3.00000183; SDB=6.00746820; UDB=6.00352149; IPR=6.00519343; BA=6.00004668; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00012387; XFM=3.00000011; UTC=2016-08-19 10:40:10 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 16081910-0013-0000-0000-000044AFFEAA Message-Id: <57B6E1F7.30005@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2016-08-19_04:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1604210000 definitions=main-1608190134 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Thanks Russell for reviewing. On Friday 19 August 2016 01:20 PM, Russell King - ARM Linux wrote: > On Fri, Aug 19, 2016 at 10:59:01AM +0530, Ravi Bangoria wrote: >> -static struct ins instructions[] = { >> +static struct ins instructions_x86[] = { >> { .name = "add", .ops = &mov_ops, }, >> { .name = "addl", .ops = &mov_ops, }, >> { .name = "addq", .ops = &mov_ops, }, >> { .name = "addw", .ops = &mov_ops, }, >> { .name = "and", .ops = &mov_ops, }, >> -#ifdef __arm__ >> - { .name = "b", .ops = &jump_ops, }, // might also be a call >> - { .name = "bcc", .ops = &jump_ops, }, >> - { .name = "bcs", .ops = &jump_ops, }, >> - { .name = "beq", .ops = &jump_ops, }, >> - { .name = "bge", .ops = &jump_ops, }, >> - { .name = "bgt", .ops = &jump_ops, }, >> - { .name = "bhi", .ops = &jump_ops, }, >> - { .name = "bl", .ops = &call_ops, }, >> - { .name = "bls", .ops = &jump_ops, }, >> - { .name = "blt", .ops = &jump_ops, }, >> - { .name = "blx", .ops = &call_ops, }, >> - { .name = "bne", .ops = &jump_ops, }, >> -#endif > Notice that ARM includes a lot of other instructions from this table, > not just those above. > >> { .name = "bts", .ops = &mov_ops, }, >> { .name = "call", .ops = &call_ops, }, >> { .name = "callq", .ops = &call_ops, }, >> @@ -456,6 +444,21 @@ static struct ins instructions[] = { >> { .name = "retq", .ops = &ret_ops, }, >> }; >> >> +static struct ins instructions_arm[] = { >> + { .name = "b", .ops = &jump_ops, }, /* might also be a call */ >> + { .name = "bcc", .ops = &jump_ops, }, >> + { .name = "bcs", .ops = &jump_ops, }, >> + { .name = "beq", .ops = &jump_ops, }, >> + { .name = "bge", .ops = &jump_ops, }, >> + { .name = "bgt", .ops = &jump_ops, }, >> + { .name = "bhi", .ops = &jump_ops, }, >> + { .name = "bl", .ops = &call_ops, }, >> + { .name = "bls", .ops = &jump_ops, }, >> + { .name = "blt", .ops = &jump_ops, }, >> + { .name = "blx", .ops = &call_ops, }, >> + { .name = "bne", .ops = &jump_ops, }, >> +}; >> + > ... >> + if (!strcmp(norm_arch, NORM_X86)) { >> + instructions = instructions_x86; >> + nmemb = ARRAY_SIZE(instructions_x86); >> + } else if (!strcmp(norm_arch, NORM_ARM)) { >> + instructions = instructions_arm; >> + nmemb = ARRAY_SIZE(instructions_arm); > But these changes result in _only_ the ones that were in the #if __arm__ > being matched. This is wrong. > > If we want to go that way, we need to add _all_ arm instructions to > instructions_arm, not just those within the #if. Yes, I've mentioned same in cover letter as well. Can I add all x86 instructions for arm as well? If not, can you please provide a list of arm instructions that needs to be added here. -Ravi