From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756571AbcHWF1x convert rfc822-to-8bit (ORCPT ); Tue, 23 Aug 2016 01:27:53 -0400 Received: from mailout1.samsung.com ([203.254.224.24]:58940 "EHLO mailout1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755680AbcHWF1u (ORCPT ); Tue, 23 Aug 2016 01:27:50 -0400 X-AuditID: cbfee68d-f79286d000007a9a-fa-57bbdeb28535 MIME-version: 1.0 Content-type: text/plain; charset=UTF-8 Content-transfer-encoding: 8BIT Message-id: <57BBDEB1.90000@samsung.com> Date: Tue, 23 Aug 2016 14:27:13 +0900 From: Chanwoo Choi Organization: Samsung Electronics User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.6.0 To: Lin Huang , heiko@sntech.de, myungjoo.ham@samsung.com Cc: tixy@linaro.org, mark.rutland@arm.com, typ@rock-chips.com, linux-rockchip@lists.infradead.org, airlied@linux.ie, mturquette@baylibre.com, dbasehore@chromium.org, sboyd@codeaurora.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, dianders@chromium.org, kyungmin.park@samsung.com, sudeep.holla@arm.com, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, mark.yao@rock-chips.com Subject: Re: [PATCH v7 6/8] Documentation: bindings: add dt documentation for rk3399 dmc References: <1471836984-6316-1-git-send-email-hl@rock-chips.com> <1471836984-6316-7-git-send-email-hl@rock-chips.com> In-reply-to: <1471836984-6316-7-git-send-email-hl@rock-chips.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrMKsWRmVeSWpSXmKPExsWyRsSkQHfTvd3hBvvOqVr0njvJZPFq8x42 i7PLDrJZXPn6ns3i/6PXrBY/Npxitjjb9IbdYtPja6wWl3fNYbP43HuE0eLTg//MFkuvX2Sy 2DHlAJPFxVOuFrcbV7BZ/DjTzWKx/NQOFouF8++zW8xeXecg7LFm3hpGj/c3Wtk9ZjdcZPG4 3NfL5HHn2h42j+3fHrB63O8+zuSxeUm9x99Z+1k8+rasYvTYfm0es8fnTXIBPFFcNimpOZll qUX6dglcGT9WOxesVqj4cK6VsYHxg2QXIyeHhICJxNZNu5ggbDGJC/fWs3UxcnEICaxglNiy rZEdpuhAUwcTRGIpo8T65m2MIAleAUGJH5PvsYDYzALqEpPmLWKGsEUkNv+9AxXXlli28DUz RPMDRonHkxawQjRrSNw6tRNsEIuAqsTE6VvYQGw2AS2J/S9ugNn8AooSV388Bqrh4BAViJDo PlEJEhYR8JHYuu802KXMAkuYJS6++wV2qbBAlMSf65fAbCGB04wSq/+UgticAo4SX0/tAztC QuADh8SUa9OhFgtIfJt8iAVkgYSArMSmA8wQH0tKHFxxg2UCo8QsJH/OQvLnLCR/zkLy5wJG llWMoqkFyQXFSelFhnrFibnFpXnpesn5uZsYgWnn9L9nvTsYbx+wPsQowMGoxMO7g313uBBr YllxZe4hRlOgiyYyS4km5wOTW15JvKGxmZGFqYmpsZG5pZmSOK+i1M9gIYH0xJLU7NTUgtSi +KLSnNTiQ4xMHJxSDYyxuyNtc1bM29W4y55BzYZv2zOWDaLvlnoVVMY3Xw/TiDj8Z+OiHS+M rt7pcL5j+HFRo/xtlbTex19EzTW5fs/cXKQvd32b6SH1T9dKs7IWuV769GepwoKXrMe+fzj7 d1vnq4x1uSJSpx4l+IiePGXe9PEtYzvv3pBX9osu3tq+1yn767rs5YvXKbEUZyQaajEXFScC AMNbh0Q2AwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrOKsWRmVeSWpSXmKPExsVy+t9jAd1N93aHG1x9JGvRe+4kk8WrzXvY LM4uO8hmceXrezaL/49es1r82HCK2eJs0xt2i02Pr7FaXN41h83ic+8RRotPD/4zWyy9fpHJ YseUA0wWF0+5WtxuXMFm8eNMN4vF8lM7WCwWzr/PbjF7dZ2DsMeaeWsYPd7faGX3mN1wkcXj cl8vk8eda3vYPLZ/e8Dqcb/7OJPH5iX1Hn9n7Wfx6NuyitFj+7V5zB6fN8kF8EQ1MNpkpCam pBYppOYl56dk5qXbKnkHxzvHm5oZGOoaWlqYKynkJeam2iq5+AToumXmAP2opFCWmFMKFApI LC5W0rfDNCE0xE3XAqYxQtc3JAiux8gADSSsYczoPXOLrWC/fMXFnq/sDYwtkl2MnBwSAiYS B5o6mCBsMYkL99azdTFycQgJLGWUWN+8jREkwSsgKPFj8j2WLkYODmYBeYkjl7JBwswC6hKT 5i1ihqh/wCjxeNICVoh6DYlbp3aC9bIIqEpMnL6FDcRmE9CS2P/iBpjNL6AocfXHY0aQmaIC ERLdJypBwiICPhJb950Gu4FZYAmzxMV3v9hBEsICURJ/rl8Cs4UETjNKrP5TCmJzCjhKfD21 j3kCo+AsJKfOQjh1FpJTFzAyr2KUSC1ILihOSs81ykst1ytOzC0uzUvXS87P3cQITlTPpHcw Ht7lfohRgINRiYf3Rt7ucCHWxLLiytxDjBIczEoivG1XgEK8KYmVValF+fFFpTmpxYcYTYF+ ncgsJZqcD0yieSXxhsYmZkaWRuaGFkbG5krivI//rwsTEkhPLEnNTk0tSC2C6WPi4JRqYLQT 57etN1kV/nSulPDuQ5KPIhT/rGXY9FikfdKsT3sCbz2a8PbiTuWTzsxvDCtFamY760yQv2K7 ir9/k816RZE0xacrOYtMbl868WPdgvU2t7/8mGjT2X+wxE+3Ne5tx0SRnS9OnnZn3XRe4tTs gvbCcp6FqjnhX4MO+Z96YWHWsOj4HOOcOZlKLMUZiYZazEXFiQBFOEqXagMAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Lin, I reply the on v6 patch[1]. If you have another opinion, please let me know. If my suggestion is not reasonable, we need to discuss it. [1] https://lkml.org/lkml/2016/8/23/28 Best Regards, Chanwoo Choi On 2016년 08월 22일 12:36, Lin Huang wrote: > This patch adds the documentation for rockchip rk3399 dmc driver. > > Signed-off-by: Lin Huang > --- > Changes in v7: > -None > > Changes in v6: > -Add more detail in Documentation > > Changes in v5: > -None > > Changes in v4: > -None > > Changes in v3: > -None > > Changes in v2: > -None > > Changes in v1: > -None > .../devicetree/bindings/devfreq/rk3399_dmc.txt | 85 ++++++++++++++++++++++ > 1 file changed, 85 insertions(+) > create mode 100644 Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt > > diff --git a/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt > new file mode 100644 > index 0000000..b787abb > --- /dev/null > +++ b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt > @@ -0,0 +1,85 @@ > +* Rockchip rk3399 DMC(Dynamic Memory Controller) device > + > +Required properties: > +- compatible: Must be "rockchip,rk3399-dmc". > +- devfreq-events: Node to get DDR loading, Refer to > + Documentation/devicetree/bindings/devfreq/rockchip-dfi.txt > +- interrupts: The interrupt number to the CPU. The interrupt specifier format > + depends on the interrupt controller. It should be DCF interrupts, > + when DDR dvfs finish, it will happen. > +- clocks: Phandles for clock specified in "clock-names" property > +- clock-names : The name of clock used by the DFI, must be "pclk_ddr_mon"; > +- operating-points-v2: Refer to Documentation/devicetree/bindings/power/opp.txt > + for details. > +- center-supply: DMC supply node. > +- status: Marks the node enabled/disabled. > + > +Optional properties: > +- ddr_timing: DDR timing need to pass to arm trust firmware > +- upthreshold: The upthreshold to simpleondeamnd policy > +- downdifferential: The downdifferential to simpleondeamnd policy > + > +Example: > + > + ddr_timing: ddr_timing { > + compatible = "rockchip,ddr-timing"; > + ddr3_speed_bin = <21>; > + pd_idle = <0>; > + sr_idle = <0>; > + sr_mc_gate_idle = <0>; > + srpd_lite_idle = <0>; > + standby_idle = <0>; > + dram_dll_dis_freq = <300>; > + phy_dll_dis_freq = <125>; > + > + ddr3_odt_dis_freq = <333>; > + ddr3_drv = ; > + ddr3_odt = ; > + phy_ddr3_ca_drv = ; > + phy_ddr3_dq_drv = ; > + phy_ddr3_odt = ; > + > + lpddr3_odt_dis_freq = <333>; > + lpddr3_drv = ; > + lpddr3_odt = ; > + phy_lpddr3_ca_drv = ; > + phy_lpddr3_dq_drv = ; > + phy_lpddr3_odt = ; > + > + lpddr4_odt_dis_freq = <333>; > + lpddr4_drv = ; > + lpddr4_dq_odt = ; > + lpddr4_ca_odt = ; > + phy_lpddr4_ca_drv = ; > + phy_lpddr4_ck_cs_drv = ; > + phy_lpddr4_dq_drv = ; > + phy_lpddr4_odt = ; > + }; > + > + dmc_opp_table: dmc_opp_table { > + compatible = "operating-points-v2"; > + > + opp00 { > + opp-hz = /bits/ 64 <300000000>; > + opp-microvolt = <900000>; > + }; > + opp01 { > + opp-hz = /bits/ 64 <666000000>; > + opp-microvolt = <900000>; > + }; > + }; > + > + dmc: dmc { > + compatible = "rockchip,rk3399-dmc"; > + devfreq-events = <&dfi>; > + interrupts = ; > + clocks = <&cru SCLK_DDRCLK>; > + clock-names = "dmc_clk"; > + ddr_timing = <&ddr_timing>; > + operating-points-v2 = <&dmc_opp_table>; > + center-supply = <&ppvar_centerlogic>; > + upthreshold = <15>; > + downdifferential = <10>; > + status = "disabled"; > + }; > + >