From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752060AbcIAFF6 (ORCPT ); Thu, 1 Sep 2016 01:05:58 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:50149 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750762AbcIAFF5 (ORCPT ); Thu, 1 Sep 2016 01:05:57 -0400 Subject: Re: [PATCH v5 2/2] phy: add a driver for the Rockchip SoC internal PCIe PHY To: =?UTF-8?Q?Heiko_St=c3=bcbner?= , Shawn Lin References: <1471661617-26432-1-git-send-email-shawn.lin@rock-chips.com> <1471661617-26432-2-git-send-email-shawn.lin@rock-chips.com> <6005500.MI6i4QbaFN@diego> CC: , , Doug Anderson , Brian Norris , Wenrui Li , Rob Herring , From: Kishon Vijay Abraham I Message-ID: <57C7B70C.3020101@ti.com> Date: Thu, 1 Sep 2016 10:35:16 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.7.2 MIME-Version: 1.0 In-Reply-To: <6005500.MI6i4QbaFN@diego> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wednesday 31 August 2016 07:38 PM, Heiko Stübner wrote: > Hi, > > Am Samstag, 20. August 2016, 10:53:37 schrieb Shawn Lin: >> This patch to add a generic PHY driver for rockchip PCIe PHY. >> Access the PHY via registers provided by GRF (general register >> files) module. >> >> Signed-off-by: Shawn Lin > > seems I'm late to the party, but when looking if I can apply the pcie- > devicetree patches, I found that the phy is still pending. > > Apart from some error-message nitpicks below, this looks ok to me. I don't > know enough about the actual pci phy part though. > > Kishon, is this on your radar? yes.. can the nipicks be fixed and posted asap? Thanks Kishon > > [...] > >> +static int rockchip_pcie_phy_power_off(struct phy *phy) >> +{ >> + struct rockchip_pcie_phy *rk_phy = phy_get_drvdata(phy); >> + int err = 0; >> + >> + err = reset_control_assert(rk_phy->phy_rst); >> + if (err) { >> + pr_err("assert phy_rst err %d\n", err); > > dev_err(phy->dev, ...) > > probably the same for all other pr_err invocations > > >> + return err; >> + } >> + >> + return 0; >> +} > > [...] > >> +static const struct of_device_id rockchip_pcie_phy_dt_ids[] = { >> + { >> + .compatible = "rockchip,rk3399-pcie-phy", >> + .data = &rk3399_pcie_data, >> + }, >> + {} >> +}; >> + >> +MODULE_DEVICE_TABLE(of, rockchip_pcie_phy_dt_ids); >> + >> +static int rockchip_pcie_phy_probe(struct platform_device *pdev) >> +{ >> + struct device *dev = &pdev->dev; >> + struct rockchip_pcie_phy *rk_phy; >> + struct phy *generic_phy; >> + struct phy_provider *phy_provider; >> + struct regmap *grf; >> + const struct of_device_id *of_id; >> + >> + grf = syscon_node_to_regmap(dev->parent->of_node); >> + if (IS_ERR(grf)) { >> + dev_err(dev, "Missing rockchip,grf property\n"); > > dev_err(dev, "Cannot find GRF syscon\n"); > > > Heiko >