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Subject: Re: [Patch v3 03/11] irqchip: axi-intc: Add support for parent intc
To: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>,
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From: Marc Zyngier <marc.zyngier@arm.com>
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Date: Thu, 1 Sep 2016 15:48:18 +0100
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On 01/09/16 14:52, Zubair Lutfullah Kakakhel wrote:
> Hi,

[...]

>> But that still doesn't address the case I had in mind, which is when you
>> have *two* AXI-intc, one cascaded into the other. Is that something that
>> could be built? You should at least make sure that there is a big fat
>> warning if you don't want to support that case, because that will be
>> hell to debug.
> 
> Oo. I didn't think of that one. tbh, I'm not sure if that is currently supported
> because this driver came out of arch/microblaze. And it didn't have any code that
> looked supportive of chained interrupt handling.
> 
> 'Technically', it should be possible to synthesize two daisy chained axi interrupt
> controllers on an FPGA. But I don't see it being supported before.
> 
> A warning would be nice. Any suggestions on the most suitable way?

Check if you've already allocated a xintc_irqc. If so, abort the probing
early...

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...