From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752661AbcIBI6o convert rfc822-to-8bit (ORCPT ); Fri, 2 Sep 2016 04:58:44 -0400 Received: from mailout4.samsung.com ([203.254.224.34]:57905 "EHLO mailout4.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751756AbcIBI6l (ORCPT ); Fri, 2 Sep 2016 04:58:41 -0400 X-AuditID: cbfee68e-f79cb6d000006cfe-71-57c93f3f2607 MIME-version: 1.0 Content-type: text/plain; charset=utf-8 Content-transfer-encoding: 8BIT Message-id: <57C93F3E.4030802@samsung.com> Date: Fri, 02 Sep 2016 17:58:38 +0900 From: Chanwoo Choi Organization: Samsung Electronics User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.6.0 To: Krzysztof Kozlowski Cc: s.nawrocki@samsung.com, tomasz.figa@gmail.com, k.kozlowski@samsung.com, linux-samsung-soc@vger.kernel.org, mturquette@baylibre.com, sboyd@codeaurora.org, linux-kernel@vger.kernel.org, kgene@kernel.org, chanwoo@kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v2 3/3] ARM: dts: Set the clock rate for DREX block 800Mhz on exynos5422-odroidxu3 References: <1472108238-24309-1-git-send-email-cw00.choi@samsung.com> <1472108238-24309-4-git-send-email-cw00.choi@samsung.com> <20160827163310.GA8616@kozik-book> In-reply-to: <20160827163310.GA8616@kozik-book> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrCIsWRmVeSWpSXmKPExsWyRsSkUNfe/mS4weL/QhYTb1xhsXj9wtCi //FrZovz5zewW2x6fI3V4mPPPVaLy7vmsFnMOL+PyeLiKVeLw2/aWS1+nOlmsVi16w+jA4/H +xut7B6X+3qZPHbOusvusWlVJ5vH5iX1Hn1bVjF6fN4kF8AexWWTkpqTWZZapG+XwJWx9v1L xoJ7chU3Jl1hbGA8JtLFyMkhIWAisah9LiuELSZx4d56NhBbSGAFo8T3S5kwNTPO/4SKL2WU eDuZA8TmFRCU+DH5HksXIwcHs4C6xJQpuSBhZgERiU875rBA2NoSyxa+Zu5i5AJqfcAoMXHt BEaQel4BLYlTz0xAalgEVCU6/z8DO4ENKLz/xQ2wVfwCihJXfzwGKxcViJDoPlEJEhYR0JS4 /vc7K8hIZoGVTBK7V3SxgySEBTIk5rx/zwqx6xejxMdL+8EGcQroS6zd/ZcdJCEhMJFDYv2W U6wQmwUkvk0+BPaAhICsxKYDzBD/SkocXHGDZQKjxCwkb85CeHMWkjdnIXlzASPLKkbR1ILk guKk9CIjveLE3OLSvHS95PzcTYzAyD/971nfDsabB6wPMQpwMCrx8F7QORkuxJpYVlyZe4jR FOigicxSosn5wPSSVxJvaGxmZGFqYmpsZG5ppiTOmyD1M1hIID2xJDU7NbUgtSi+qDQntfgQ IxMHp1QDY3jGVo05SpM/tJU5cfNvnaHF4v78U/Mhc9PfX2afLb7Ake8seFW7985cyYzXLFIZ t0NO+bIdtTp++17CywWRP84FTLl8NV39DdeaF7IN5dMrHvIcOrO1sfeLXeI8psjbkw/7Hd1z yenYdUvJZ2ujRJ4c59z/42+s6ofVAtvU95YwPpnY92p9fbUSS3FGoqEWc1FxIgD+8yKe9wIA AA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprBKsWRmVeSWpSXmKPExsVy+t9jAV17+5PhBhe281hMvHGFxeL1C0OL /sevmS3On9/AbrHp8TVWi48991gtLu+aw2Yx4/w+JouLp1wtDr9pZ7X4caabxWLVrj+MDjwe 72+0sntc7utl8tg56y67x6ZVnWwem5fUe/RtWcXo8XmTXAB7VAOjTUZqYkpqkUJqXnJ+SmZe uq2Sd3C8c7ypmYGhrqGlhbmSQl5ibqqtkotPgK5bZg7QnUoKZYk5pUChgMTiYiV9O0wTQkPc dC1gGiN0fUOC4HqMDNBAwhrGjCmPbrIV7JGraJ43n7mBcYlIFyMnh4SAicSM8z/ZIGwxiQv3 1oPZQgJLGSXeTuYAsXkFBCV+TL7H0sXIwcEsIC9x5FI2hKkuMWVKbhcjF1D1A0aJiWsnMILE eQW0JE49MwHpZBFQlej8/4wVxGYDCu9/cQNsOr+AosTVH4/BykUFIiS6T1SChEUENCWu//3O CjKSWWAlk8TuFV3sIAlhgQyJOe/fs0Ls+sUo8fHSfrBBnAL6Emt3/2WfwCg4C8mlsxAunYVw 6QJG5lWMEqkFyQXFSem5Rnmp5XrFibnFpXnpesn5uZsYwanimfQOxsO73A8xCnAwKvHwPrA6 GS7EmlhWXJl7iFGCg1lJhNfBBijEm5JYWZValB9fVJqTWnyI0RTo14nMUqLJ+cA0llcSb2hs YmZkaWRuaGFkbK4kzvv4/7owIYH0xJLU7NTUgtQimD4mDk6pBsbFme+2fnlx9kq7y+EZzLM3 OUx39fqvpHkqbYH+Hr8jxYcSt/9cXXSkMPkVi8Wjj2r1ai3W3sIcLV9/z9Fi/GMixMuj/jV+ olOQtKZmLNOMVf5FL2omT/UN/fZbROV8749H4de0vxYeMFD4OnuW6ecHnyVusu22XLIzkjPo bZPUUTHD5MV6IduVWIozEg21mIuKEwFaZRTXKwMAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2016년 08월 28일 01:33, Krzysztof Kozlowski wrote: > On Thu, Aug 25, 2016 at 03:57:18PM +0900, Chanwoo Choi wrote: >> This patch sets the clock rate for DREX (DRAM Express) block >> on exynos5422-odroidxu3 board. In the exynos5422 TRM, >> DRAM clocks use BPLL clock and CMU_CDREX generates >> the 800MHz DRAM clock. >> > >>>From the commit message I don't get two things: > 1. Why setting this on XU3-family of boards, not all 542x/5800? I have the only xu3 board. I cannot test it on other boards. > 2. Why this is needed? The commit msg lacks the answer to the "why". In the exynos5422's TRM, CMU_CDREX generates the 800MHz DRAM clock as above commit message. But, I'm missing what there is different before applying this patch. I add comment why we should set the clock rate for DRAM on below. > >> [clk_summary on exynos5422-odroidxu3 board] >> fout_bpll 0 0 800000000 0 0 >> mout_bpll 0 0 800000000 0 0 >> mout_mclk_cdrex 0 0 800000000 0 0 >> dout_pclk_core_mem 0 0 200000000 0 0 >> dout_sclk_cdrex 0 0 800000000 0 0 >> > > What is the purpose of this dump of clk_summary? Is it a state before or > after the change? After it is quite obvious that it should have > 800MHz... I'm missing the difference before applying this patch. As I mentioned on v1[1] patch, if I don't set the clock rate for CDREX, the default clock is 825MHz instead of 800MHz. So, I set the clock rate on this patch. [1] https://lkml.org/lkml/2016/8/22/255 If I don't apply this patch, the DREX clock is 825MHz. fout_bpll 0 0 825000000 0 0 mout_bpll 0 0 825000000 0 0 mout_mclk_cdrex 0 0 825000000 0 0 dout_pclk_core_mem 0 0 206250000 0 0 dout_sclk_cdrex 0 0 825000000 0 0 dout_clk2x_phy0 0 0 825000000 0 0 dout_aclk_cdrex1 0 0 412500000 0 0 dout_pclk_cdrex 0 0 103125000 0 0 dout_cclk_drex0 0 0 412500000 0 0 If you want to edit the commit message, I'll resend the v3 patch. Best Regards, Chanwoo Choi > > Best regards, > Krzysztof > >> Signed-off-by: Chanwoo Choi >> --- >> arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 5 +++++ >> 1 file changed, 5 insertions(+) >> >> diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi >> index d56253049ccb..fd3f67c72039 100644 >> --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi >> +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi >> @@ -229,6 +229,11 @@ >> status = "okay"; >> }; >> >> +&clock { >> + assigned-clocks = <&clock CLK_DOUT_SCLK_CDREX>; >> + assigned-clock-rates = <800000000>; >> +}; >> + >> &clock_audss { >> assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>, >> <&clock_audss EXYNOS_MOUT_I2S>, >> -- >> 1.9.1 >> >> >> _______________________________________________ >> linux-arm-kernel mailing list >> linux-arm-kernel@lists.infradead.org >> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel > -- > To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html > > >