From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933339AbcINVfr (ORCPT ); Wed, 14 Sep 2016 17:35:47 -0400 Received: from mga02.intel.com ([134.134.136.20]:54264 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753427AbcINVfm (ORCPT ); Wed, 14 Sep 2016 17:35:42 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.30,335,1470726000"; d="scan'208";a="8650909" Subject: Re: [PATCH v2 2/3] x86 Test and expose CPUID faulting capabilities in /proc/cpuinfo To: Kyle Huey , "Robert O'Callahan" References: <1473886902-17902-1-git-send-email-khuey@kylehuey.com> <1473886902-17902-3-git-send-email-khuey@kylehuey.com> Cc: Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" , Boris Ostrovsky , David Vrabel , Juergen Gross , Borislav Petkov , Andy Lutomirski , Peter Zijlstra , Huang Rui , "Rafael J. Wysocki" , Len Brown , Srinivas Pandruvada , Aravind Gopalakrishnan , Alexander Shishkin , Vladimir Zapolskiy , Kristen Carlson Accardi , "open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)" , "moderated list:XEN HYPERVISOR INTERFACE" From: Dave Hansen Message-ID: <57D9C2AC.8050905@linux.intel.com> Date: Wed, 14 Sep 2016 14:35:40 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.8.0 MIME-Version: 1.0 In-Reply-To: <1473886902-17902-3-git-send-email-khuey@kylehuey.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 09/14/2016 02:01 PM, Kyle Huey wrote: > Xen advertises the underlying support for CPUID faulting but not does pass > through writes to the relevant MSR, nor does it virtualize it, so it does > not actually work. For now mask off the relevant bit on MSR_PLATFORM_INFO. That needs to make it into a comment, please. That *is* a Xen bug, right? > Signed-off-by: Kyle Huey > --- > arch/x86/include/asm/cpufeatures.h | 1 + > arch/x86/include/asm/msr-index.h | 1 + > arch/x86/kernel/cpu/scattered.c | 14 ++++++++++++++ > arch/x86/xen/enlighten.c | 3 +++ > 4 files changed, 19 insertions(+) > > diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h > index 92a8308..78b9d06 100644 > --- a/arch/x86/include/asm/cpufeatures.h > +++ b/arch/x86/include/asm/cpufeatures.h > @@ -190,6 +190,7 @@ > > #define X86_FEATURE_CPB ( 7*32+ 2) /* AMD Core Performance Boost */ > #define X86_FEATURE_EPB ( 7*32+ 3) /* IA32_ENERGY_PERF_BIAS support */ > +#define X86_FEATURE_CPUID_FAULT ( 7*32+ 4) /* Intel CPUID faulting */ > > #define X86_FEATURE_HW_PSTATE ( 7*32+ 8) /* AMD HW-PState */ > #define X86_FEATURE_PROC_FEEDBACK ( 7*32+ 9) /* AMD ProcFeedbackInterface */ > diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h > index 56f4c66..83908d5 100644 > --- a/arch/x86/include/asm/msr-index.h > +++ b/arch/x86/include/asm/msr-index.h > @@ -41,6 +41,7 @@ > #define MSR_IA32_PERFCTR1 0x000000c2 > #define MSR_FSB_FREQ 0x000000cd > #define MSR_PLATFORM_INFO 0x000000ce > +#define CPUID_FAULTING_SUPPORT (1UL << 31) > > #define MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2 > #define NHM_C3_AUTO_DEMOTE (1UL << 25) > diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c > index 8cb57df..d502da1 100644 > --- a/arch/x86/kernel/cpu/scattered.c > +++ b/arch/x86/kernel/cpu/scattered.c > @@ -24,6 +24,17 @@ enum cpuid_regs { > CR_EBX > }; > > +static int supports_cpuid_faulting(void) > +{ > + unsigned int lo, hi; > + > + if (rdmsr_safe(MSR_PLATFORM_INFO, &lo, &hi) == 0 && > + (lo & CPUID_FAULTING_SUPPORT)) > + return 1; > + else > + return 0; > +} Is any of this useful to optimize away at compile-time? We have config options for when we're running as a guest, and this seems like a feature that isn't available when running on bare metal. > diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c > index b86ebb1..2c47f0c 100644 > --- a/arch/x86/xen/enlighten.c > +++ b/arch/x86/xen/enlighten.c > @@ -1050,6 +1050,9 @@ static u64 xen_read_msr_safe(unsigned int msr, int *err) > #endif > val &= ~X2APIC_ENABLE; > break; > + case MSR_PLATFORM_INFO: > + val &= ~CPUID_FAULTING_SUPPORT; > + break; > } > return val; > } Does this mean that Xen guests effectively can't take advantage of this feature?