From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753627AbcJNRdf (ORCPT ); Fri, 14 Oct 2016 13:33:35 -0400 Received: from foss.arm.com ([217.140.101.70]:40962 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753029AbcJNRde (ORCPT ); Fri, 14 Oct 2016 13:33:34 -0400 Subject: Re: [PATCH] irqchip/gic: Enable gic_set_affinity set more than one cpu To: Cheng Chao References: <1476356234-7570-1-git-send-email-cs.os.kernel@gmail.com> <20161013163140.5f23abce@arm.com> <1c4adb8a-f7f7-3474-273a-edf34f575b8d@gmail.com> Cc: tglx@linutronix.de, jason@lakedaemon.net, linux-kernel@vger.kernel.org From: Marc Zyngier X-Enigmail-Draft-Status: N1110 Organization: ARM Ltd Message-ID: <580116EB.7050106@arm.com> Date: Fri, 14 Oct 2016 18:33:31 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Icedove/38.7.0 MIME-Version: 1.0 In-Reply-To: <1c4adb8a-f7f7-3474-273a-edf34f575b8d@gmail.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 14/10/16 03:08, Cheng Chao wrote: > Marc, > > Thanks for your comments. > > Cheng > > on 10/13/2016 11:31 PM, Marc Zyngier wrote: >> On Thu, 13 Oct 2016 18:57:14 +0800 >> Cheng Chao wrote: >> >>> GIC can distribute an interrupt to more than one cpu, >>> but now, gic_set_affinity sets only one cpu to handle interrupt. >> >> What makes you think this is a good idea? What purpose does it serves? >> I can only see drawbacks to this: You're waking up more than one CPU, >> wasting power, adding jitter and clobbering the cache. >> >> I assume you see a benefit to that approach, so can you please spell it >> out? >> > > Ok, You are right, but the performance is another point that we should consider. > > We use E1 device to transmit/receive video stream. we find that E1's interrupt is > only on the one cpu that cause this cpu usage is almost 100%, > but other cpus is much lower load, so the performance is not good. > the cpu is 4-core. It looks to me like you're barking up the wrong tree. We have NAPI-enabled network drivers for this exact reason, and adding more interrupts to an already overloaded system doesn't strike me as going in the right direction. May I suggest that you look at integrating NAPI into your E1 driver? > so add CONFIG_ARM_GIC_AFFINITY_SINGLE_CPU is better? > thus we can make a trade-off between the performance with the power etc. No, that's pretty horrible, and I'm not even going to entertain the idea. I suggest you start investigating how to mitigate your interrupt rate instead of just taking more of them. Thanks, M. -- Jazz is not dead. It just smells funny...