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[175.34.8.244]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-36b908e15acsm409862a91.2.2026.05.27.21.11.44 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 27 May 2026 21:11:52 -0700 (PDT) Message-ID: <58143176-8311-4eb8-85ef-625c5249fd0f@redhat.com> Date: Thu, 28 May 2026 14:11:41 +1000 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v14 21/44] KVM: arm64: Support timers in realm RECs To: Steven Price , kvm@vger.kernel.org, kvmarm@lists.linux.dev Cc: Catalin Marinas , Marc Zyngier , Will Deacon , James Morse , Oliver Upton , Suzuki K Poulose , Zenghui Yu , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Joey Gouly , Alexandru Elisei , Christoffer Dall , Fuad Tabba , linux-coco@lists.linux.dev, Ganapatrao Kulkarni , Shanker Donthineni , Alper Gun , "Aneesh Kumar K . V" , Emi Kisanuki , Vishal Annapurve , WeiLin.Chang@arm.com, Lorenzo.Pieralisi2@arm.com References: <20260513131757.116630-1-steven.price@arm.com> <20260513131757.116630-22-steven.price@arm.com> Content-Language: en-US From: Gavin Shan In-Reply-To: <20260513131757.116630-22-steven.price@arm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi Steve, On 5/13/26 11:17 PM, Steven Price wrote: > The RMM keeps track of the timer while the realm REC is running, but on > exit to the normal world KVM is responsible for handling the timers. > > A later patch adds the support for propagating the timer values from the > exit data structure and calling kvm_realm_timers_update(). > > Signed-off-by: Steven Price > --- > Changes since v12: > * Adapt to upstream changes. > Changes since v11: > * Drop the kvm_is_realm() check from timer_set_offset(). We already > ensure that the offset is 0 when calling the function. > Changes since v10: > * KVM_CAP_COUNTER_OFFSET is now already hidden by a previous patch. > Changes since v9: > * No need to move the call to kvm_timer_unblocking() in > kvm_timer_vcpu_load(). > Changes since v7: > * Hide KVM_CAP_COUNTER_OFFSET for realm guests. > --- > arch/arm64/kvm/arch_timer.c | 28 +++++++++++++++++++++++++--- > include/kvm/arm_arch_timer.h | 2 ++ > 2 files changed, 27 insertions(+), 3 deletions(-) > > diff --git a/arch/arm64/kvm/arch_timer.c b/arch/arm64/kvm/arch_timer.c > index cbea4d9ee955..88ed01edc136 100644 > --- a/arch/arm64/kvm/arch_timer.c > +++ b/arch/arm64/kvm/arch_timer.c > @@ -470,6 +470,21 @@ static void kvm_timer_update_irq(struct kvm_vcpu *vcpu, bool new_level, > timer_ctx); > } > > +void kvm_realm_timers_update(struct kvm_vcpu *vcpu) > +{ > + struct arch_timer_cpu *arch_timer = &vcpu->arch.timer_cpu; > + int i; > + > + for (i = 0; i < NR_KVM_EL0_TIMERS; i++) { > + struct arch_timer_context *timer = &arch_timer->timers[i]; > + bool status = timer_get_ctl(timer) & ARCH_TIMER_CTRL_IT_STAT; > + bool level = kvm_timer_irq_can_fire(timer) && status; > + > + if (level != timer->irq.level) > + kvm_timer_update_irq(vcpu, level, timer); > + } > +} > + > /* Only called for a fully emulated timer */ > static void timer_emulate(struct arch_timer_context *ctx) > { > @@ -1079,7 +1094,7 @@ static void timer_context_init(struct kvm_vcpu *vcpu, int timerid) > > ctxt->timer_id = timerid; > > - if (!kvm_vm_is_protected(vcpu->kvm)) { > + if (!kvm_vm_is_protected(vcpu->kvm) && !kvm_is_realm(vcpu->kvm)) { > if (timerid == TIMER_VTIMER) > ctxt->offset.vm_offset = &kvm->arch.timer_data.voffset; > else s/!kvm_is_realm(vcpu->kvm)/!vcpu_is_rec(vcpu) > @@ -1110,7 +1125,7 @@ void kvm_timer_vcpu_init(struct kvm_vcpu *vcpu) > timer_context_init(vcpu, i); > > /* Synchronize offsets across timers of a VM if not already provided */ > - if (!vcpu_is_protected(vcpu) && > + if (!vcpu_is_protected(vcpu) && !kvm_is_realm(vcpu->kvm) && > !test_bit(KVM_ARCH_FLAG_VM_COUNTER_OFFSET, &vcpu->kvm->arch.flags)) { > timer_set_offset(vcpu_vtimer(vcpu), kvm_phys_timer_read()); > timer_set_offset(vcpu_ptimer(vcpu), 0); Same as above. > @@ -1611,6 +1626,13 @@ int kvm_timer_enable(struct kvm_vcpu *vcpu) > return -EINVAL; > } > > + /* > + * We don't use mapped IRQs for Realms because the RMI doesn't allow > + * us setting the LR.HW bit in the VGIC. > + */ > + if (vcpu_is_rec(vcpu)) > + return 0; > + > get_timer_map(vcpu, &map); > > ops = vgic_is_v5(vcpu->kvm) ? &arch_timer_irq_ops_vgic_v5 : > @@ -1740,7 +1762,7 @@ int kvm_vm_ioctl_set_counter_offset(struct kvm *kvm, > if (offset->reserved) > return -EINVAL; > > - if (kvm_vm_is_protected(kvm)) > + if (kvm_vm_is_protected(kvm) || kvm_is_realm(kvm)) > return -EINVAL; > > mutex_lock(&kvm->lock); > diff --git a/include/kvm/arm_arch_timer.h b/include/kvm/arm_arch_timer.h > index bf8cc9589bd0..ffdb90dcad58 100644 > --- a/include/kvm/arm_arch_timer.h > +++ b/include/kvm/arm_arch_timer.h > @@ -113,6 +113,8 @@ int kvm_arm_timer_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr); > int kvm_arm_timer_get_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr); > int kvm_arm_timer_has_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr); > > +void kvm_realm_timers_update(struct kvm_vcpu *vcpu); > + > u64 kvm_phys_timer_read(void); > > void kvm_timer_vcpu_load(struct kvm_vcpu *vcpu); Thanks, Gavin