From: Chris Zhong <zyw@rock-chips.com>
To: John Keeping <john@metanate.com>, Mark Yao <mark.yao@rock-chips.com>
Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
linux-rockchip@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [01/26] drm/rockchip: dw-mipi-dsi: use mode from display state
Date: Tue, 17 Jan 2017 18:38:41 +0800 [thread overview]
Message-ID: <587DF431.5040003@rock-chips.com> (raw)
In-Reply-To: <20160919171747.28512-2-john@metanate.com>
On 09/20/2016 01:17 AM, John Keeping wrote:
> There is no need to keep a pointer to the mode around since we know it
> will be present in the connector state.
>
> Signed-off-by: John Keeping <john@metanate.com>
> ---
> drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 31 ++++++++++++++++---------------
> 1 file changed, 16 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> index ca22e5ee89ca..a87037556f5c 100644
> --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> @@ -286,7 +286,6 @@ struct dw_mipi_dsi {
> u32 format;
> u16 input_div;
> u16 feedback_div;
> - struct drm_display_mode *mode;
>
> const struct dw_mipi_dsi_plat_data *pdata;
> };
> @@ -332,9 +331,10 @@ static int max_mbps_to_testdin(unsigned int max_mbps)
> */
> static void dw_mipi_dsi_wait_for_two_frames(struct dw_mipi_dsi *dsi)
> {
> + struct drm_display_mode *mode = &dsi->connector.state->crtc->state->adjusted_mode;
> int refresh, two_frames;
>
> - refresh = drm_mode_vrefresh(dsi->mode);
> + refresh = drm_mode_vrefresh(mode);
> two_frames = DIV_ROUND_UP(MSEC_PER_SEC, refresh) * 2;
> msleep(two_frames);
> }
> @@ -461,6 +461,7 @@ static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
>
> static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi)
> {
> + struct drm_display_mode *mode = &dsi->connector.state->crtc->state->adjusted_mode;
> unsigned int i, pre;
> unsigned long mpclk, pllref, tmp;
> unsigned int m = 1, n = 1, target_mbps = 1000;
> @@ -474,7 +475,7 @@ static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi)
> return bpp;
> }
>
> - mpclk = DIV_ROUND_UP(dsi->mode->clock, MSEC_PER_SEC);
> + mpclk = DIV_ROUND_UP(mode->clock, MSEC_PER_SEC);
> if (mpclk) {
> /* take 1 / 0.9, since mbps must big than bandwidth of RGB */
> tmp = mpclk * (bpp / dsi->lanes) * 10 / 9;
> @@ -689,9 +690,9 @@ static void dw_mipi_dsi_init(struct dw_mipi_dsi *dsi)
> dsi_write(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS);
> }
>
> -static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi,
> - struct drm_display_mode *mode)
> +static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi)
> {
> + struct drm_display_mode *mode = &dsi->connector.state->crtc->state->adjusted_mode;
> u32 val = 0, color = 0;
>
> switch (dsi->format) {
> @@ -726,9 +727,10 @@ static void dw_mipi_dsi_packet_handler_config(struct dw_mipi_dsi *dsi)
> dsi_write(dsi, DSI_PCKHDL_CFG, EN_CRC_RX | EN_ECC_RX | EN_BTA);
> }
>
> -static void dw_mipi_dsi_video_packet_config(struct dw_mipi_dsi *dsi,
> - struct drm_display_mode *mode)
> +static void dw_mipi_dsi_video_packet_config(struct dw_mipi_dsi *dsi)
> {
> + struct drm_display_mode *mode = &dsi->connector.state->crtc->state->adjusted_mode;
> +
> dsi_write(dsi, DSI_VID_PKT_SIZE, VID_PKT_SIZE(mode->hdisplay));
> }
>
> @@ -744,12 +746,13 @@ static void dw_mipi_dsi_command_mode_config(struct dw_mipi_dsi *dsi)
> static u32 dw_mipi_dsi_get_hcomponent_lbcc(struct dw_mipi_dsi *dsi,
> u32 hcomponent)
> {
> + struct drm_display_mode *mode = &dsi->connector.state->crtc->state->adjusted_mode;
> u32 frac, lbcc;
>
> lbcc = hcomponent * dsi->lane_mbps * MSEC_PER_SEC / 8;
>
> - frac = lbcc % dsi->mode->clock;
> - lbcc = lbcc / dsi->mode->clock;
> + frac = lbcc % mode->clock;
> + lbcc = lbcc / mode->clock;
> if (frac)
> lbcc++;
>
> @@ -759,7 +762,7 @@ static u32 dw_mipi_dsi_get_hcomponent_lbcc(struct dw_mipi_dsi *dsi,
> static void dw_mipi_dsi_line_timer_config(struct dw_mipi_dsi *dsi)
> {
> u32 htotal, hsa, hbp, lbcc;
> - struct drm_display_mode *mode = dsi->mode;
> + struct drm_display_mode *mode = &dsi->connector.state->crtc->state->adjusted_mode;
>
> htotal = mode->htotal;
> hsa = mode->hsync_end - mode->hsync_start;
> @@ -778,7 +781,7 @@ static void dw_mipi_dsi_line_timer_config(struct dw_mipi_dsi *dsi)
> static void dw_mipi_dsi_vertical_timing_config(struct dw_mipi_dsi *dsi)
> {
> u32 vactive, vsa, vfp, vbp;
> - struct drm_display_mode *mode = dsi->mode;
> + struct drm_display_mode *mode = &dsi->connector.state->crtc->state->adjusted_mode;
>
> vactive = mode->vdisplay;
> vsa = mode->vsync_end - mode->vsync_start;
> @@ -821,8 +824,6 @@ static void dw_mipi_dsi_encoder_mode_set(struct drm_encoder *encoder,
> struct dw_mipi_dsi *dsi = encoder_to_dsi(encoder);
> int ret;
>
> - dsi->mode = adjusted_mode;
> -
I prefer to keep the original method, although this"dsi->mode" pointer
is same as "&dsi->connector.state->crtc->state->adjusted_mode; "
I still think dsi->mode makes the process easier to read
> ret = dw_mipi_dsi_get_lane_bps(dsi);
> if (ret < 0)
> return;
> @@ -833,10 +834,10 @@ static void dw_mipi_dsi_encoder_mode_set(struct drm_encoder *encoder,
> }
>
> dw_mipi_dsi_init(dsi);
> - dw_mipi_dsi_dpi_config(dsi, mode);
> + dw_mipi_dsi_dpi_config(dsi);
> dw_mipi_dsi_packet_handler_config(dsi);
> dw_mipi_dsi_video_mode_config(dsi);
> - dw_mipi_dsi_video_packet_config(dsi, mode);
> + dw_mipi_dsi_video_packet_config(dsi);
> dw_mipi_dsi_command_mode_config(dsi);
> dw_mipi_dsi_line_timer_config(dsi);
> dw_mipi_dsi_vertical_timing_config(dsi);
next prev parent reply other threads:[~2017-01-17 10:46 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-19 17:17 [PATCH 00/27] drm/rockchip: MIPI fixes & improvements John Keeping
2016-09-19 17:17 ` [PATCH 01/26] drm/rockchip: dw-mipi-dsi: use mode from display state John Keeping
2017-01-17 10:38 ` Chris Zhong [this message]
2017-01-18 2:21 ` [01/26] " Mark yao
2016-09-19 17:17 ` [PATCH 02/26] drm/rockchip: dw-mipi-dsi: pass new mode into MIPI mode set John Keeping
2016-09-19 17:17 ` [PATCH 03/26] drm/rockchip: dw-mipi-dsi: don't configure hardware in mode_set for MIPI John Keeping
2016-09-19 17:17 ` [PATCH 04/26] drm/rockchip: dw-mipi-dsi: rename commit hook to enable John Keeping
2016-09-19 17:17 ` [PATCH 05/26] drm/rockchip: dw-mipi-dsi: fix command header writes John Keeping
2017-01-17 9:32 ` [05/26] " Chris Zhong
2016-09-19 17:17 ` [PATCH 06/26] drm/rockchip: dw-mipi-dsi: fix generic packet status check John Keeping
2016-09-19 17:17 ` [PATCH 07/26] drm/rockchip: dw-mipi-dsi: avoid out-of-bounds read on tx_buf John Keeping
2016-09-19 17:17 ` [PATCH 08/26] drm/rockchip: dw-mipi-dsi: include bad value in error message John Keeping
2016-09-19 17:17 ` [PATCH 09/26] drm/rockchip: dw-mipi-dsi: respect message flags John Keeping
2016-09-19 17:17 ` [PATCH 10/26] drm/rockchip: dw-mipi-dsi: only request HS clock when required John Keeping
2016-09-19 17:17 ` [PATCH 11/26] drm/rockchip: dw-mipi-dsi: don't assume buffer is aligned John Keeping
2016-09-19 17:17 ` [PATCH 12/26] drm/rockchip: dw-mipi-dsi: prepare panel after phy init John Keeping
2016-09-19 17:17 ` [PATCH 13/26] drm/rockchip: dw-mipi-dsi: allow commands in panel_disable John Keeping
2016-09-19 17:17 ` [PATCH 14/26] drm/rockchip: dw-mipi-dsi: fix escape clock rate John Keeping
2016-09-19 17:17 ` [PATCH 14/27] drm/rockchip: dw-mipi-dsi: use specific poll helper John Keeping
2016-09-19 17:17 ` [PATCH 15/26] drm/rockchip: dw-mipi-dsi: ensure PHY is reset John Keeping
2016-09-19 17:17 ` [PATCH 15/27] drm/rockchip: dw-mipi-dsi: use positive check for N{H,V}SYNC John Keeping
2016-09-19 17:17 ` [PATCH 16/26] drm/rockchip: dw-mipi-dsi: configure bias and bandgap before enable John Keeping
2016-09-19 17:17 ` [PATCH 16/27] drm/rockchip: dw-mipi-dsi: fix escape clock rate John Keeping
2016-09-19 17:17 ` [PATCH 17/26] drm/rockchip: dw-mipi-dsi: don't enable PHY PLL until it's configured John Keeping
2016-09-19 17:17 ` [PATCH 17/27] drm/rockchip: dw-mipi-dsi: ensure PHY is reset John Keeping
2016-09-19 17:17 ` [PATCH 18/27] drm/rockchip: dw-mipi-dsi: configure bias and bandgap before enable John Keeping
2016-09-19 17:17 ` [PATCH 18/26] drm/rockchip: dw-mipi-dsi: properly configure PHY timing John Keeping
2016-09-19 17:17 ` [PATCH 19/27] drm/rockchip: dw-mipi-dsi: don't enable PHY PLL until it's configured John Keeping
2016-09-19 17:17 ` [PATCH 19/26] drm/rockchip: dw-mipi-dsi: improve PLL configuration John Keeping
2016-09-19 17:17 ` [PATCH 20/27] drm/rockchip: dw-mipi-dsi: properly configure PHY timing John Keeping
2016-09-19 17:17 ` [PATCH 20/26] drm/rockchip: dw-mipi-dsi: use specific poll helper John Keeping
2016-09-19 17:17 ` [PATCH 21/27] drm/rockchip: dw-mipi-dsi: improve PLL configuration John Keeping
2016-09-19 17:17 ` [PATCH 21/26] drm/rockchip: dw-mipi-dsi: use positive check for N{H,V}SYNC John Keeping
2016-09-19 17:17 ` [PATCH 22/27] drm/rockchip: dw-mipi-dsi: defer probe if panel is not loaded John Keeping
2016-09-19 17:17 ` [PATCH 22/26] drm/rockchip: vop: test for P{H,V}SYNC John Keeping
2016-09-19 17:17 ` [PATCH 23/26] drm/rockchip: dw-mipi-dsi: defer probe if panel is not loaded John Keeping
2016-09-19 17:17 ` [PATCH 23/27] drm/rockchip: dw-mipi-dsi: support non-burst modes John Keeping
2016-09-19 17:17 ` [PATCH 24/26] " John Keeping
2016-09-19 17:17 ` [PATCH 24/27] drm/rockchip: vop: test for P{H,V}SYNC John Keeping
2016-09-19 17:17 ` [PATCH 25/26] drm/rockchip: dw-mipi-dsi: add reset control John Keeping
2016-09-19 17:17 ` [PATCH 26/26] drm/rockchip: dw-mipi-dsi: support read commands John Keeping
2016-09-19 17:24 ` [PATCH 00/27] drm/rockchip: MIPI fixes & improvements John Keeping
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