Re: [PATCH] clk: at91: sam9x60: Don't use audio PLL

Codrin.Ciubotariu
2020-01-31T11:51:56Z

On 31.01.2020 12:42, Claudiu Beznea - M18063 wrote:
> Hi Codrin,
>
> On 30.01.2020 19:47, Codrin Ciubotariu wrote:
>> On sam9x60, there is not audio PLL and so I2S and classD have to use one
>> of the best matching parents for their generated clock.
>>
>> Fixes: 01e2113de9a5 ("clk: at91: add sam9x60 pmc driver")
>> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
>> ---
>> drivers/clk/at91/sam9x60.c | 6 ++----
>> 1 file changed, 2 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c
>> index 77398aefeb6d..0aeb44fed9de 100644
>> --- a/drivers/clk/at91/sam9x60.c
>> +++ b/drivers/clk/at91/sam9x60.c
>> @@ -144,11 +144,9 @@ static const struct {
>> { .n = "sdmmc1_gclk", .id = 26, .r = { .min = 0, .max = 105000000 }, },
>> { .n = "flex11_gclk", .id = 32, },
>> { .n = "flex12_gclk", .id = 33, },
>> - { .n = "i2s_gclk", .id = 34, .r = { .min = 0, .max = 105000000 },
>> - .pll = true, },
>> + { .n = "i2s_gclk", .id = 34, .r = { .min = 0, .max = 105000000 }, },
>> { .n = "pit64b_gclk", .id = 37, },
>> - { .n = "classd_gclk", .id = 42, .r = { .min = 0, .max = 100000000 },
>> - .pll = true, },
>> + { .n = "classd_gclk", .id = 42, .r = { .min = 0, .max = 100000000 }, },
>> { .n = "tcb1_gclk", .id = 45, },
>> { .n = "dbgu_gclk", .id = 47, },
>> };
>
> Please remove also the pll member of:
>
> static const struct {
> char *n;
> u8 id;
> struct clk_range r;
> bool pll;
> }

Sure, will send v2.

Thanks and best regards,
Codrin