From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751697AbdBXAeS (ORCPT ); Thu, 23 Feb 2017 19:34:18 -0500 Received: from mailout3.samsung.com ([203.254.224.33]:57625 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751531AbdBXAeN (ORCPT ); Thu, 23 Feb 2017 19:34:13 -0500 MIME-version: 1.0 Content-type: text/plain; charset=utf-8 X-AuditID: b6c32a2d-f793d6d0000012b6-9e-58af7cccc411 Content-transfer-encoding: 8BIT Message-id: <58AF7CCB.5070303@samsung.com> Date: Fri, 24 Feb 2017 09:22:35 +0900 From: Chanwoo Choi Organization: Samsung Electronics User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.6.0 To: Linus Walleij , Andi Shyti Cc: Tomasz Figa , Krzysztof Kozlowski , Sylwester Nawrocki , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , Kukjin Kim , Javier Martinez Canillas , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , linux-samsung-soc , "linux-kernel@vger.kernel.org" , stable , Andi Shyti Subject: Re: [PATCH v2 1/4] pinctrl: samsung: Fix the width of PINCFG_TYPE_DRV bitfields for Exynos5433 In-reply-to: X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrOJsWRmVeSWpSXmKPExsWy7bCmlu6ZmvURBlNu6FpsP/KM1WLxj+dM Fu+X9TBazD9yjtXizds1TBb9j18zW5w/v4HdYsqf5UwWmx5fY7W4vGsOm8WM8/uYLJZev8hk 0br3CLvF4TftrBYLNj5itFi16w+jxcuPJ1gcBD3WzFvD6HF9ySdmj52z7rJ7bFrVyeZx59oe No/NS+o9tvQDhfq2rGL0+LxJLoAzKtUmIzUxJbVIITUvOT8lMy/dVsk7ON453tTMwFDX0NLC XEkhLzE31VbJxSdA1y0zB+gXJYWyxJxSoFBAYnGxkr6dTVF+aUmqQkZ+cYmtUrShoZGeoYG5 npGRkZ6JcayVkSlQSUJqxvpFz1kKXjtUtKz/w9zA+Nyki5GDQ0LARGLjHqYuRk4gU0ziwr31 bF2MXBxCAksZJTb8OMUO4bQzScxrP88IUWUicfLzFaiqOYwS7/YuBGvnFRCU+DH5HgvIVGYB eYkjl7JBwswCmhIvvkxiAbGFBO4xSmye5QRRriVxY8E8dpByFgFViSczRUHCbEDh/S9usIHY /AKKEld/PAZbKyoQIbFz/jd2EFtEIFjiU1M32AnMAttYJSY+eQ5WJCyQKTG/pxnM5gQqmrL1 BhNIkYTAXA6JOxM6mCA+lpXYdIAZ4hcXiY9zL0J9Lyzx6vgWdghbWuLv0luMEL3djBJrXjax Qjg9jBKNa46yQVQZS9x/cI8Z4ks+id7fT6AW8Ep0tAlBlHhIzNr6hhXCdpTYfnEiCyTgOpgk frVPY5/AqDALKexmIcJuFlLYLWBkXsUollpQnJueWmxaYKRXnJhbXJqXrpecn7uJEZyotXR3 MH5Z4H2IUYCDUYmHNyNpfYQQa2JZcWXuIUYJDmYlEd60dKAQb0piZVVqUX58UWlOavEhRlNg 2E9klhJNzgdmkbySeEMTM0MTI0sgNDc0VxLnjTKYGCEkkJ5YkpqdmlqQWgTTx8TBKdXAqDPF xnfzDet5ddsfHz4af8w6bJX+tJT1sm+tuD2rdP7Vp9e6XnvnHOkZcm9pybUs13UZmosdBZcz vtBMiX0QN/f2qbjbPedySxs6t789qb4k0M/86tLg7d+0BRb+szr+9tm0XS8T320xjejzE5r0 LiI6TWGSpYtbsf2MjVFvsvUz3H+ePSB3RImlOCPRUIu5qDgRAHdpTjnqAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpkleLIzCtJLcpLzFFi42I5/e+xoO7pmvURBpsOqVpsP/KM1WLxj+dM Fu+X9TBazD9yjtXizds1TBb9j18zW5w/v4HdYsqf5UwWmx5fY7W4vGsOm8WM8/uYLJZev8hk 0br3CLvF4TftrBYLNj5itFi16w+jxcuPJ1gcBD3WzFvD6HF9ySdmj52z7rJ7bFrVyeZx59oe No/NS+o9tvQDhfq2rGL0+LxJLoAzys0mIzUxJbVIITUvOT8lMy/dVik0xE3XQkkhLzE31VYp Qtc3JEhJoSwxpxTIMzJAAw7OAe7BSvp2CW4Z6xc9Zyl47VDRsv4PcwPjc5MuRk4OCQETiZOf r7BB2GISF+6tB7K5OIQEZjFKnNyzkhUkwSsgKPFj8j2WLkYODmYBeYkjl7IhTHWJKVNyQSqE BB4wSvxawQFRrSVxY8E8dpASFgFViSczRUHCbEDh/S9ugG3iF1CUuPrjMSNIiahAhET3iUqQ sIhAsMSvE52sIAcwC2xjldgy/zITSEJYIFPiz4IeRojLupgk+rZ9BhvECdRx58cLtgmMgrOQ HDoL4dBZCIcuYGRexSiRWpBcUJyUnmuUl1quV5yYW1yal66XnJ+7iREc/c+kdzAe3uV+iFGA g1GJh7fjxboIIdbEsuLK3EOMEhzMSiK8aenrI4R4UxIrq1KL8uOLSnNSiw8xmgK9OpFZSjQ5 H5iY8kriDU3MTcyNDSzMLS1NjJTEeRtnPwsXEkhPLEnNTk0tSC2C6WPi4JRqYOR9fW9J3Dnv lymCsl28ZR9/ZtzRr9oxofwOW4ljwB7t2W661XvV05be+aK1zumwUtyXiqN7/CeeLp1RtOhy yrJixg9Xgrat+MrN7/qxeBe7ytL3IWv/HLFQjDlQ9U1wu1f7F/cr4tk73zBeW3JMZz9LkeW9 M2XHJ7KYXbu+5O+BfBVnrfynIe5KLMUZiYZazEXFiQDVqh8jFAMAAA== X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170224002235epcas5p30d732cdcab05677f343fcbdf3035dcc1 X-Msg-Generator: CA X-Sender-IP: 203.254.230.27 X-Local-Sender: =?UTF-8?B?7LWc7LCs7JqwG1RpemVuIFBsYXRmb3JtIExhYihTL1fshLw=?= =?UTF-8?B?7YSwKRvsgrzshLHsoITsnpAbUzUo7LGF7J6EKS/ssYXsnoQ=?= X-Global-Sender: =?UTF-8?B?Q2hhbndvbyBDaG9pG1RpemVuIFBsYXRmb3JtIExhYi4bU2Ft?= =?UTF-8?B?c3VuZyBFbGVjdHJvbmljcxtTNS9TZW5pb3IgRW5naW5lZXI=?= X-Sender-Code: =?UTF-8?B?QzEwG1NUQUYbQzEwVjgxMTE=?= CMS-TYPE: 105P DLP-Filter: Pass X-CFilter-Loop: Reflected X-HopCount: 7 X-CMS-RootMailID: 20161230041426epcas1p1f827d3cee8b607d81e9921b412ddf301 X-RootMTR: 20161230041426epcas1p1f827d3cee8b607d81e9921b412ddf301 References: <20161230041421.24448-1-andi.shyti@samsung.com> <20161230041421.24448-2-andi.shyti@samsung.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Linus, On 2016년 12월 30일 22:28, Linus Walleij wrote: > On Fri, Dec 30, 2016 at 5:14 AM, Andi Shyti wrote: > >> From: Chanwoo Choi >> >> This patch fixes the wrong width of PINCFG_TYPE_DRV bitfields for Exynos5433 >> because PINCFG_TYPE_DRV of Exynos5433 has 4bit fields in the *_DRV >> registers. Usually, other Exynos have 2bit field for PINCFG_TYPE_DRV. >> >> Fixes: 3c5ecc9ed353 ("pinctrl: exynos: Add support for Exynos5433") >> Cc: stable@vger.kernel.org >> Cc: Tomasz Figa >> Cc: Krzysztof Kozlowski >> Cc: Sylwester Nawrocki >> Cc: Linus Walleij >> Cc: Kukjin Kim >> Cc: Javier Martinez Canillas >> Signed-off-by: Chanwoo Choi > > Nominally I think you should sign this off too Andi, as you are in the delivery > path. > > Patch applied for fixes. This patch was already merged on your git and then merge it on tovalds's git[1]. But, when I checked the latest drivers/pinctrl/samsung/pinctrl-exynos.c, it doesn't contain the all codes of patch[1]. Maybe, I think that there was some merge conflict[2]. [1] https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/drivers/pinctrl/samsung/pinctrl-exynos.c?id=1259feddd0f83649d5c48d730c140b4f7f3fa288 [2] https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/drivers/pinctrl/samsung/pinctrl-exynos.c?id=7f36f5d11cda050b118f76d774151427a18d15ef So, How can we fix it? If you want to resend the new patch, I'll do. To help you understand, I just added the diff on the below. Best Regards, Chanwoo Choi diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c index f9b49967f512..63e51b56a22a 100644 --- a/drivers/pinctrl/samsung/pinctrl-exynos.c +++ b/drivers/pinctrl/samsung/pinctrl-exynos.c @@ -1468,82 +1468,82 @@ static void exynos_retention_disable(struct samsung_pinctrl_drv_data *drvdata) /* pin banks of exynos5433 pin-controller - ALIVE */ static const struct samsung_pin_bank_data exynos5433_pin_banks0[] __initconst = { - EXYNOS_PIN_BANK_EINTW(8, 0x000, "gpa0", 0x00), - EXYNOS_PIN_BANK_EINTW(8, 0x020, "gpa1", 0x04), - EXYNOS_PIN_BANK_EINTW(8, 0x040, "gpa2", 0x08), - EXYNOS_PIN_BANK_EINTW(8, 0x060, "gpa3", 0x0c), - EXYNOS_PIN_BANK_EINTW_EXT(8, 0x020, "gpf1", 0x1004, 1), - EXYNOS_PIN_BANK_EINTW_EXT(4, 0x040, "gpf2", 0x1008, 1), - EXYNOS_PIN_BANK_EINTW_EXT(4, 0x060, "gpf3", 0x100c, 1), - EXYNOS_PIN_BANK_EINTW_EXT(8, 0x080, "gpf4", 0x1010, 1), - EXYNOS_PIN_BANK_EINTW_EXT(8, 0x0a0, "gpf5", 0x1014, 1), + EXYNOS5433_PIN_BANK_EINTW(8, 0x000, "gpa0", 0x00), + EXYNOS5433_PIN_BANK_EINTW(8, 0x020, "gpa1", 0x04), + EXYNOS5433_PIN_BANK_EINTW(8, 0x040, "gpa2", 0x08), + EXYNOS5433_PIN_BANK_EINTW(8, 0x060, "gpa3", 0x0c), + EXYNOS5433_PIN_BANK_EINTW_EXT(8, 0x020, "gpf1", 0x1004, 1), + EXYNOS5433_PIN_BANK_EINTW_EXT(4, 0x040, "gpf2", 0x1008, 1), + EXYNOS5433_PIN_BANK_EINTW_EXT(4, 0x060, "gpf3", 0x100c, 1), + EXYNOS5433_PIN_BANK_EINTW_EXT(8, 0x080, "gpf4", 0x1010, 1), + EXYNOS5433_PIN_BANK_EINTW_EXT(8, 0x0a0, "gpf5", 0x1014, 1), }; /* pin banks of exynos5433 pin-controller - AUD */ static const struct samsung_pin_bank_data exynos5433_pin_banks1[] __initconst = { - EXYNOS_PIN_BANK_EINTG(7, 0x000, "gpz0", 0x00), - EXYNOS_PIN_BANK_EINTG(4, 0x020, "gpz1", 0x04), + EXYNOS5433_PIN_BANK_EINTG(7, 0x000, "gpz0", 0x00), + EXYNOS5433_PIN_BANK_EINTG(4, 0x020, "gpz1", 0x04), }; /* pin banks of exynos5433 pin-controller - CPIF */ static const struct samsung_pin_bank_data exynos5433_pin_banks2[] __initconst = { - EXYNOS_PIN_BANK_EINTG(2, 0x000, "gpv6", 0x00), + EXYNOS5433_PIN_BANK_EINTG(2, 0x000, "gpv6", 0x00), }; /* pin banks of exynos5433 pin-controller - eSE */ static const struct samsung_pin_bank_data exynos5433_pin_banks3[] __initconst = { - EXYNOS_PIN_BANK_EINTG(3, 0x000, "gpj2", 0x00), + EXYNOS5433_PIN_BANK_EINTG(3, 0x000, "gpj2", 0x00), }; /* pin banks of exynos5433 pin-controller - FINGER */ static const struct samsung_pin_bank_data exynos5433_pin_banks4[] __initconst = { - EXYNOS_PIN_BANK_EINTG(4, 0x000, "gpd5", 0x00), + EXYNOS5433_PIN_BANK_EINTG(4, 0x000, "gpd5", 0x00), }; /* pin banks of exynos5433 pin-controller - FSYS */ static const struct samsung_pin_bank_data exynos5433_pin_banks5[] __initconst = { - EXYNOS_PIN_BANK_EINTG(6, 0x000, "gph1", 0x00), - EXYNOS_PIN_BANK_EINTG(7, 0x020, "gpr4", 0x04), - EXYNOS_PIN_BANK_EINTG(5, 0x040, "gpr0", 0x08), - EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpr1", 0x0c), - EXYNOS_PIN_BANK_EINTG(2, 0x080, "gpr2", 0x10), - EXYNOS_PIN_BANK_EINTG(8, 0x0a0, "gpr3", 0x14), + EXYNOS5433_PIN_BANK_EINTG(6, 0x000, "gph1", 0x00), + EXYNOS5433_PIN_BANK_EINTG(7, 0x020, "gpr4", 0x04), + EXYNOS5433_PIN_BANK_EINTG(5, 0x040, "gpr0", 0x08), + EXYNOS5433_PIN_BANK_EINTG(8, 0x060, "gpr1", 0x0c), + EXYNOS5433_PIN_BANK_EINTG(2, 0x080, "gpr2", 0x10), + EXYNOS5433_PIN_BANK_EINTG(8, 0x0a0, "gpr3", 0x14), }; /* pin banks of exynos5433 pin-controller - IMEM */ static const struct samsung_pin_bank_data exynos5433_pin_banks6[] __initconst = { - EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpf0", 0x00), + EXYNOS5433_PIN_BANK_EINTG(8, 0x000, "gpf0", 0x00), }; /* pin banks of exynos5433 pin-controller - NFC */ static const struct samsung_pin_bank_data exynos5433_pin_banks7[] __initconst = { - EXYNOS_PIN_BANK_EINTG(3, 0x000, "gpj0", 0x00), + EXYNOS5433_PIN_BANK_EINTG(3, 0x000, "gpj0", 0x00), }; /* pin banks of exynos5433 pin-controller - PERIC */ static const struct samsung_pin_bank_data exynos5433_pin_banks8[] __initconst = { - EXYNOS_PIN_BANK_EINTG(6, 0x000, "gpv7", 0x00), - EXYNOS_PIN_BANK_EINTG(5, 0x020, "gpb0", 0x04), - EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpc0", 0x08), - EXYNOS_PIN_BANK_EINTG(2, 0x060, "gpc1", 0x0c), - EXYNOS_PIN_BANK_EINTG(6, 0x080, "gpc2", 0x10), - EXYNOS_PIN_BANK_EINTG(8, 0x0a0, "gpc3", 0x14), - EXYNOS_PIN_BANK_EINTG(2, 0x0c0, "gpg0", 0x18), - EXYNOS_PIN_BANK_EINTG(4, 0x0e0, "gpd0", 0x1c), - EXYNOS_PIN_BANK_EINTG(6, 0x100, "gpd1", 0x20), - EXYNOS_PIN_BANK_EINTG(8, 0x120, "gpd2", 0x24), - EXYNOS_PIN_BANK_EINTG(5, 0x140, "gpd4", 0x28), - EXYNOS_PIN_BANK_EINTG(2, 0x160, "gpd8", 0x2c), - EXYNOS_PIN_BANK_EINTG(7, 0x180, "gpd6", 0x30), - EXYNOS_PIN_BANK_EINTG(3, 0x1a0, "gpd7", 0x34), - EXYNOS_PIN_BANK_EINTG(5, 0x1c0, "gpg1", 0x38), - EXYNOS_PIN_BANK_EINTG(2, 0x1e0, "gpg2", 0x3c), - EXYNOS_PIN_BANK_EINTG(8, 0x200, "gpg3", 0x40), + EXYNOS5433_PIN_BANK_EINTG(6, 0x000, "gpv7", 0x00), + EXYNOS5433_PIN_BANK_EINTG(5, 0x020, "gpb0", 0x04), + EXYNOS5433_PIN_BANK_EINTG(8, 0x040, "gpc0", 0x08), + EXYNOS5433_PIN_BANK_EINTG(2, 0x060, "gpc1", 0x0c), + EXYNOS5433_PIN_BANK_EINTG(6, 0x080, "gpc2", 0x10), + EXYNOS5433_PIN_BANK_EINTG(8, 0x0a0, "gpc3", 0x14), + EXYNOS5433_PIN_BANK_EINTG(2, 0x0c0, "gpg0", 0x18), + EXYNOS5433_PIN_BANK_EINTG(4, 0x0e0, "gpd0", 0x1c), + EXYNOS5433_PIN_BANK_EINTG(6, 0x100, "gpd1", 0x20), + EXYNOS5433_PIN_BANK_EINTG(8, 0x120, "gpd2", 0x24), + EXYNOS5433_PIN_BANK_EINTG(5, 0x140, "gpd4", 0x28), + EXYNOS5433_PIN_BANK_EINTG(2, 0x160, "gpd8", 0x2c), + EXYNOS5433_PIN_BANK_EINTG(7, 0x180, "gpd6", 0x30), + EXYNOS5433_PIN_BANK_EINTG(3, 0x1a0, "gpd7", 0x34), + EXYNOS5433_PIN_BANK_EINTG(5, 0x1c0, "gpg1", 0x38), + EXYNOS5433_PIN_BANK_EINTG(2, 0x1e0, "gpg2", 0x3c), + EXYNOS5433_PIN_BANK_EINTG(8, 0x200, "gpg3", 0x40), }; /* pin banks of exynos5433 pin-controller - TOUCH */ static const struct samsung_pin_bank_data exynos5433_pin_banks9[] __initconst = { - EXYNOS_PIN_BANK_EINTG(3, 0x000, "gpj1", 0x00), + EXYNOS5433_PIN_BANK_EINTG(3, 0x000, "gpj1", 0x00), }; /*