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Thu, 6 Feb 2025 06:32:06 -0800 (PST) Message-ID: <58e08371-8d43-4f84-baaf-64b0af95c7cb@linux.intel.com> Date: Thu, 6 Feb 2025 09:32:04 -0500 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 11/24] perf vendor events: Update/add Graniterapids events/metrics To: Ian Rogers Cc: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Alexander Shishkin , Jiri Olsa , Adrian Hunter , =?UTF-8?Q?Andreas_F=C3=A4rber?= , Manivannan Sadhasivam , Weilin Wang , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, Perry Taylor , Samantha Alt , Caleb Biggers , Edward Baker , Michael Petlan , Thomas Falcon References: <20250205173140.238294-1-irogers@google.com> <20250205173140.238294-12-irogers@google.com> <7692d2d6-16d5-4f50-8c3a-37f1db356426@linux.intel.com> <9fa56c75-2ee6-4901-9e04-0ec23412fd62@linux.intel.com> Content-Language: en-US From: "Liang, Kan" In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 2025-02-05 4:33 p.m., Ian Rogers wrote: > On Wed, Feb 5, 2025 at 1:10 PM Liang, Kan wrote: >> >> On 2025-02-05 3:23 p.m., Ian Rogers wrote: >>> On Wed, Feb 5, 2025 at 11:11 AM Liang, Kan wrote: >>>> >>>> On 2025-02-05 12:31 p.m., Ian Rogers wrote: >>>>> + { >>>>> + "BriefDescription": "This category represents fraction of slots utilized by useful work i.e. issued uops that eventually get retired", >>>>> + "MetricExpr": "topdown\\-retiring / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) + 0 * slots", >>>>> + "MetricGroup": "BvUW;TmaL1;TopdownL1;tma_L1_group", >>>>> + "MetricName": "tma_retiring", >>>>> + "MetricThreshold": "tma_retiring > 0.7 | tma_heavy_operations > 0.1", >>>>> + "MetricgroupNoGroup": "TopdownL1", >>>>> + "PublicDescription": "This category represents fraction of slots utilized by useful work i.e. issued uops that eventually get retired. Ideally; all pipeline slots would be attributed to the Retiring category. Retiring of 100% would indicate the maximum Pipeline_Width throughput was achieved. Maximizing Retiring typically increases the Instructions-per-cycle (see IPC metric). Note that a high Retiring value does not necessary mean there is no room for more performance. For example; Heavy-operations or Microcode Assists are categorized under Retiring. They often indicate suboptimal performance and can often be optimized or avoided. Sample with: UOPS_RETIRED.SLOTS", >>>>> + "ScaleUnit": "100%" >>>>> + }, >>>> >>>> The "Default" tag is missed for GNR as well. >>>> It seems the new CPUIDs are not added in the script? >>> >>> Spotted it, we need to manually say which architectures with TopdownL1 >>> should be in Default because it was insisted upon that pre-Icelake >>> CPUs with TopdownL1 not have TopdownL1 in Default. As you know, my >>> preference would be to always put TopdownL1 metrics into Default. >>> >> >> For the future platforms, there should be always at least TopdownL1 >> support. Intel even adds extra fixed counters for the TopdownL1 events. >> >> Maybe the script should be changed to only mark the old pre-Icelake as >> no TopdownL1 Default. For the other platforms, always add TopdownL1 as >> Default. It would avoid manually adding it for every new platforms. > > That's fair. What about TopdownL2 that is currently only in the > Default set for SPR? > Yes, the TopdownL2 is a bit tricky, which requires much more events. Could you please set it just for SPR/EMR/GNR for now? I will ask around internally and make a long-term solution for the TopdownL2. Thanks, Kan