From: Laxman Dewangan <ldewangan@nvidia.com>
To: Jon Hunter <jonathanh@nvidia.com>, <thierry.reding@gmail.com>
Cc: <linux-pwm@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH V2] pwm: tegra: Set maximum pwm clock source per SoC tapeout
Date: Mon, 15 May 2017 20:47:16 +0530 [thread overview]
Message-ID: <5919C67C.8070006@nvidia.com> (raw)
In-Reply-To: <5908C555.7090204@nvidia.com>
On Tuesday 02 May 2017 11:13 PM, Laxman Dewangan wrote:
>
> On Tuesday 02 May 2017 08:53 PM, Jon Hunter wrote:
>> On 02/05/17 15:05, Laxman Dewangan wrote:
>>> The PWM hardware IP is taped-out with different maximum frequency
>>> on different SoCs.
>>>
>>> From HW team:
>>> Before Tegra186, it is 38.4MHz.
>>> In Tegra186, it is 102MHz.
>>>
>>> Add support to limit the clock source frequency to the maximum IP
>>> supported frequency. Provide these values via SoC chipdata.
>>>
>>> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
>>>
>>> ---
>>> Changes from V1:
>>> - Set the 48MHz maximum frequency for Tegra210 and earlier.
>> I think that your changelog needs to be updated, because it still says
>> 38.4MHz and not 48MHz.
>>
>
> Oops, thanks for pointing.
>
> Thierry,
> Do I need to recycle the patch or can be corrected when applying?
> If there is any further review comment in code then I will recycle and
> correct it.
Thierry,
Can you please review?
next prev parent reply other threads:[~2017-05-15 15:17 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-02 14:05 [PATCH V2] pwm: tegra: Set maximum pwm clock source per SoC tapeout Laxman Dewangan
2017-05-02 15:23 ` Jon Hunter
2017-05-02 17:43 ` Laxman Dewangan
2017-05-02 20:10 ` Jon Hunter
2017-05-15 15:17 ` Laxman Dewangan [this message]
2017-06-13 12:32 ` Thierry Reding
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