From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751459AbdGZU4N (ORCPT ); Wed, 26 Jul 2017 16:56:13 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:57114 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750982AbdGZU4M (ORCPT ); Wed, 26 Jul 2017 16:56:12 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 92DC060262 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=skannan@codeaurora.org Message-ID: <597901EA.6080702@codeaurora.org> Date: Wed, 26 Jul 2017 13:56:10 -0700 From: Saravana Kannan User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130329 Thunderbird/17.0.5 MIME-Version: 1.0 To: Peter Zijlstra CC: Viresh Kumar , Rafael Wysocki , Ingo Molnar , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, smuckle.linux@gmail.com, eas-dev@lists.linaro.org Subject: Re: [Eas-dev] [PATCH V3 2/3] cpufreq: schedutil: Process remote callback for shared policies References: <3fbaa9aaba19bfff5ff25d2c4141e88fb83f1ea9.1499927699.git.viresh.kumar@linaro.org> <5968263D.1020801@codeaurora.org> <20170720122239.licc6yjd7jwipcvk@hirez.programming.kicks-ass.net> In-Reply-To: <20170720122239.licc6yjd7jwipcvk@hirez.programming.kicks-ass.net> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 07/20/2017 05:22 AM, Peter Zijlstra wrote: > So the typical implementation of fast switching we're thinking of is the > CPU writing the DVFS request into a machine register. Now machine > registers are typically per logical CPU. Writing to a memory addressable register. AFAIK, ARM has no support for a machine register for DVFS request. So, even if any ARM licensee wants to add one, it won't be possible. Also, even if we have an ARM CPU with a machine register, rejecting a valid frequency switch just because it happened to come on a different CPU seem silly (you can have a huge performance hit due to that). A much better solution is to just make an IPI to the right CPU and execute the machine register write on the right CPU. -Saravana -- Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project