Re: [PATCH V3 2/2] perf/x86: Reset the dirty counter to prevent the leak for an RDPMC task

["Liang, Kan" <kan.liang@linux.intel.com>]

On 4/14/2021 9:51 AM, Namhyung Kim wrote:
> Hi Kan,
> 
> On Wed, Apr 14, 2021 at 4:04 AM <kan.liang@linux.intel.com> wrote:
>> diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
>> index dd9f3c2..0d4a1a3 100644
>> --- a/arch/x86/events/core.c
>> +++ b/arch/x86/events/core.c
>> @@ -1585,6 +1585,8 @@ static void x86_pmu_del(struct perf_event *event, int flags)
>>          if (cpuc->txn_flags & PERF_PMU_TXN_ADD)
>>                  goto do_del;
>>
>> +       __set_bit(event->hw.idx, cpuc->dirty);
>> +
>>          /*
>>           * Not a TXN, therefore cleanup properly.
>>           */
>> @@ -2304,12 +2306,46 @@ static int x86_pmu_event_init(struct perf_event *event)
>>          return err;
>>   }
>>
>> +void x86_pmu_clear_dirty_counters(void)
>> +{
>> +       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
>> +       int i;
>> +
>> +       if (bitmap_empty(cpuc->dirty, X86_PMC_IDX_MAX))
>> +               return;
> 
> Maybe you can check it after clearing assigned counters.
> 

It should be very likely that the cpuc->dirty is non-empty.
Move it after the clearing can skip the for_each_set_bit() and 
bitmap_zero().
OK. I will change it in V4.

Thanks,
Kan