From: Wei Wang <wei.w.wang@intel.com>
To: Andi Kleen <ak@linux.intel.com>
Cc: virtualization@lists.linux-foundation.org, kvm@vger.kernel.org,
linux-kernel@vger.kernel.org, pbonzini@redhat.com,
mst@redhat.com, rkrcmar@redhat.com, mingo@redhat.com
Subject: Re: [PATCH v1 0/4] Enable LBR for the guest
Date: Tue, 26 Sep 2017 16:47:19 +0800 [thread overview]
Message-ID: <59CA1417.7070602@intel.com> (raw)
In-Reply-To: <20170925145908.GN4311@tassilo.jf.intel.com>
On 09/25/2017 10:59 PM, Andi Kleen wrote:
> On Mon, Sep 25, 2017 at 12:44:52PM +0800, Wei Wang wrote:
>> This patch series enables the Last Branch Recording feature for the
>> guest. Instead of trapping each LBR stack MSR access, the MSRs are
>> passthroughed to the guest. Those MSRs are switched (i.e. load and
>> saved) on VMExit and VMEntry.
>>
>> Test:
>> Try "perf record -b ./test_program" on guest.
> I don't see where you expose the PERF capabilities MSR?
>
> That's normally needed for LBR too to report the version
> number.
>
It was missed, thanks for pointing it out. I also found KVM/QEMU doesn't
expose CPUID.PDCM, will add that too.
Since for now we are enabling LBR, I plan to expose only "PERF_CAP & 0x3f"
to the guest, which reports the LBR format only.
On the other side, it seems that the (guest) kernel driver also works
without
the above being supported, should we change it to report error and stop
using the PMU features when the check of the above two fails (at
intel_pmu_init())?
Best,
Wei
next prev parent reply other threads:[~2017-09-26 8:44 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-25 4:44 [PATCH v1 0/4] Enable LBR for the guest Wei Wang
2017-09-25 4:44 ` [PATCH v1 1/4] KVM/vmx: re-write the msr auto switch feature Wei Wang
2017-09-25 11:54 ` Paolo Bonzini
2017-09-25 13:02 ` Wei Wang
2017-09-25 14:24 ` Paolo Bonzini
2017-09-25 4:44 ` [PATCH v1 2/4] KVM/vmx: auto switch MSR_IA32_DEBUGCTLMSR Wei Wang
2017-09-25 11:57 ` Paolo Bonzini
2017-09-25 4:44 ` [PATCH v1 3/4] perf/x86: add a function to get the lbr stack Wei Wang
2017-09-25 4:44 ` [PATCH v1 4/4] KVM/vmx: enable lbr for the guest Wei Wang
2017-09-25 9:16 ` Paolo Bonzini
2017-09-25 12:57 ` Wei Wang
2017-09-25 14:57 ` Andi Kleen
2017-09-26 8:56 ` Wei Wang
2017-09-26 16:41 ` Andi Kleen
2017-09-27 1:27 ` Wei Wang
2017-09-25 14:59 ` [PATCH v1 0/4] Enable LBR " Andi Kleen
2017-09-26 8:47 ` Wei Wang [this message]
2017-09-26 16:51 ` Andi Kleen
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=59CA1417.7070602@intel.com \
--to=wei.w.wang@intel.com \
--cc=ak@linux.intel.com \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@redhat.com \
--cc=mst@redhat.com \
--cc=pbonzini@redhat.com \
--cc=rkrcmar@redhat.com \
--cc=virtualization@lists.linux-foundation.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).