From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.3 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 617E8C3F2D3 for ; Fri, 28 Feb 2020 15:16:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3FF182469D for ; Fri, 28 Feb 2020 15:16:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727116AbgB1PQM (ORCPT ); Fri, 28 Feb 2020 10:16:12 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:57970 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726945AbgB1PQM (ORCPT ); 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Fri, 28 Feb 2020 15:14:55 +0000 Received: from b01ledav001.gho.pok.ibm.com (b01ledav001.gho.pok.ibm.com [9.57.199.106]) by b01cxnp22036.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 01SFEshx16253840 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 28 Feb 2020 15:14:54 GMT Received: from b01ledav001.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 333582805C; Fri, 28 Feb 2020 15:14:54 +0000 (GMT) Received: from b01ledav001.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3C33028068; Fri, 28 Feb 2020 15:14:53 +0000 (GMT) Received: from [9.211.148.203] (unknown [9.211.148.203]) by b01ledav001.gho.pok.ibm.com (Postfix) with ESMTP; Fri, 28 Feb 2020 15:14:53 +0000 (GMT) Subject: Re: [PATCH v2] ARM: dts: rainier: Set PCA9552 pin types To: Matthew Barth , Joel Stanley , Andrew Jeffery , openbmc@lists.ozlabs.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, Brandon Wyman References: <20200225201415.431668-1-msbarth@linux.ibm.com> From: Eddie James Message-ID: <59ceccbd-b776-51fc-e80b-39427c70ec70@linux.ibm.com> Date: Fri, 28 Feb 2020 09:14:52 -0600 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1 MIME-Version: 1.0 In-Reply-To: <20200225201415.431668-1-msbarth@linux.ibm.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-28_04:2020-02-28,2020-02-28 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 impostorscore=0 phishscore=0 spamscore=0 suspectscore=0 clxscore=1015 bulkscore=0 mlxlogscore=999 priorityscore=1501 mlxscore=0 adultscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2001150001 definitions=main-2002280121 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2/25/20 2:14 PM, Matthew Barth wrote: > All 16 pins of the PCA9552 at 7-bit address 0x61 should be set as type > GPIO. > > Signed-off-by: Matthew Barth Reviewed-by: Eddie James > --- > v2: Added leds-pca955x.h include > Added upstream to patch > --- > --- > arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts > index c63cefce636d..d9fa9fd48058 100644 > --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts > +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts > @@ -4,6 +4,7 @@ > > #include "aspeed-g6.dtsi" > #include > +#include > > / { > model = "Rainier"; > @@ -351,66 +352,82 @@ > > gpio@0 { > reg = <0>; > + type = ; > }; > > gpio@1 { > reg = <1>; > + type = ; > }; > > gpio@2 { > reg = <2>; > + type = ; > }; > > gpio@3 { > reg = <3>; > + type = ; > }; > > gpio@4 { > reg = <4>; > + type = ; > }; > > gpio@5 { > reg = <5>; > + type = ; > }; > > gpio@6 { > reg = <6>; > + type = ; > }; > > gpio@7 { > reg = <7>; > + type = ; > }; > > gpio@8 { > reg = <8>; > + type = ; > }; > > gpio@9 { > reg = <9>; > + type = ; > }; > > gpio@10 { > reg = <10>; > + type = ; > }; > > gpio@11 { > reg = <11>; > + type = ; > }; > > gpio@12 { > reg = <12>; > + type = ; > }; > > gpio@13 { > reg = <13>; > + type = ; > }; > > gpio@14 { > reg = <14>; > + type = ; > }; > > gpio@15 { > reg = <15>; > + type = ; > }; > }; >