From: Wei Wang <wei.w.wang@intel.com>
To: Andi Kleen <ak@linux.intel.com>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"pbonzini@redhat.com" <pbonzini@redhat.com>,
"peterz@infradead.org" <peterz@infradead.org>,
"Liang, Kan" <kan.liang@intel.com>,
"mingo@redhat.com" <mingo@redhat.com>,
"rkrcmar@redhat.com" <rkrcmar@redhat.com>,
"Xu, Like" <like.xu@intel.com>,
"jannh@google.com" <jannh@google.com>,
"arei.gonglei@huawei.com" <arei.gonglei@huawei.com>,
"jmattson@google.com" <jmattson@google.com>
Subject: Re: [PATCH v5 12/12] KVM/VMX/vPMU: support to report GLOBAL_STATUS_LBRS_FROZEN
Date: Mon, 18 Feb 2019 09:59:56 +0800 [thread overview]
Message-ID: <5C6A119C.8080009@intel.com> (raw)
In-Reply-To: <20190215131014.GC16922@tassilo.jf.intel.com>
On 02/15/2019 09:10 PM, Andi Kleen wrote:
>
> OK. The freeze bits need to be cleared by IA32_PERF_GLOBAL_STATUS_RESET, which seems not supported by the perf code yet (thus guest won't clear them). Would handle_irq_v4 also need to be changed to support that?
> In Arch Perfmon v4 it is cleared by the MSR_CORE_PERF_GLOBAL_OVF_CTRL write
Not very sure about this one. The spec 18.2.4.2 mentions
"IA32_PERF_GLOBAL_STATUS_RESET provides additional bit fields to clear
the new indicators.."
IIUIC, the new freeze bits can only be cleared by RESET.
> But the guest KVM pmu doesn't support v4 so far, so the only way to clear it is through DEBUGCTL.
>
> STATUS_RESET would only be needed to set it from the guest, which is not necessary at least for now
> (and would be also v4)
>
> At some point the guest PMU should probably be updated for v4, but it can be done
> separately from this.
>
Agree. I think the guest perf won't work in v4 mode if the KVM vPMU
exposes it is v3.
Probably we could also leave the freeze bits virtualization support to
another series of vPMU v4 support?
We would also need to use the STATUS_SET in v4 to set the freeze bits of
GLOBAL_STATUS when
entering the guest (instead of clearing the guest debugctl), so that we
could achieve architectural emulation.
Best,
Wei
prev parent reply other threads:[~2019-02-18 1:55 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-14 9:06 [PATCH v5 00/12] Guest LBR Enabling Wei Wang
2019-02-14 9:06 ` [PATCH v5 01/12] perf/x86: fix the variable type of the LBR MSRs Wei Wang
2019-02-14 9:06 ` [PATCH v5 02/12] perf/x86: add a function to get the lbr stack Wei Wang
2019-02-14 9:06 ` [PATCH v5 03/12] KVM/x86: KVM_CAP_X86_GUEST_LBR Wei Wang
2019-02-14 16:21 ` Andi Kleen
2019-02-14 9:06 ` [PATCH v5 04/12] KVM/x86: intel_pmu_lbr_enable Wei Wang
2019-02-14 9:06 ` [PATCH v5 05/12] KVM/x86/vPMU: tweak kvm_pmu_get_msr Wei Wang
2019-02-14 9:06 ` [PATCH v5 06/12] KVM/x86: expose MSR_IA32_PERF_CAPABILITIES to the guest Wei Wang
2019-02-14 9:06 ` [PATCH v5 07/12] perf/x86: no counter allocation support Wei Wang
2019-02-14 16:26 ` Andi Kleen
2019-02-15 8:49 ` Wang, Wei W
2019-02-14 9:06 ` [PATCH v5 08/12] KVM/x86/vPMU: Add APIs to support host save/restore the guest lbr stack Wei Wang
2019-02-14 9:06 ` [PATCH v5 09/12] perf/x86: save/restore LBR_SELECT on vCPU switching Wei Wang
2019-02-14 9:06 ` [PATCH v5 10/12] KVM/x86/lbr: lazy save the guest lbr stack Wei Wang
2019-02-15 1:49 ` Like Xu
2019-02-15 9:00 ` Wang, Wei W
2019-02-14 9:06 ` [PATCH v5 11/12] KVM/x86: remove the common handling of the debugctl msr Wei Wang
2019-02-14 9:06 ` [PATCH v5 12/12] KVM/VMX/vPMU: support to report GLOBAL_STATUS_LBRS_FROZEN Wei Wang
2019-02-14 16:31 ` Andi Kleen
2019-02-15 8:56 ` Wang, Wei W
2019-02-15 13:10 ` Andi Kleen
2019-02-18 1:59 ` Wei Wang [this message]
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