From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.7 required=3.0 tests=DKIM_ADSP_CUSTOM_MED, FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 72F37C76191 for ; Fri, 26 Jul 2019 10:25:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 492B6229F9 for ; Fri, 26 Jul 2019 10:25:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726430AbfGZKZY (ORCPT ); Fri, 26 Jul 2019 06:25:24 -0400 Received: from emh04.mail.saunalahti.fi ([62.142.5.110]:33226 "EHLO emh04.mail.saunalahti.fi" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725815AbfGZKZY (ORCPT ); Fri, 26 Jul 2019 06:25:24 -0400 X-Greylist: delayed 424 seconds by postgrey-1.27 at vger.kernel.org; Fri, 26 Jul 2019 06:25:22 EDT Received: from toshiba (85-76-77-1-nat.elisa-mobile.fi [85.76.77.1]) by emh04.mail.saunalahti.fi (Postfix) with ESMTP id 3008430034; Fri, 26 Jul 2019 13:18:17 +0300 (EEST) Message-ID: <5D3AD35E.FB77B44F@gmail.com> Date: Fri, 26 Jul 2019 13:18:06 +0300 From: Jari Ruusu MIME-Version: 1.0 To: Greg Kroah-Hartman CC: linux-kernel@vger.kernel.org, stable@vger.kernel.org, "Peter Zijlstra (Intel)" , Linus Torvalds , Thomas Gleixner , Ingo Molnar , Sasha Levin Subject: Re: [PATCH 4.19 079/271] x86/atomic: Fix smp_mb__{before,after}_atomic() References: <20190724191655.268628197@linuxfoundation.org> <20190724191701.954991110@linuxfoundation.org> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Greg Kroah-Hartman wrote: > [ Upstream commit 69d927bba39517d0980462efc051875b7f4db185 ] > > Recent probing at the Linux Kernel Memory Model uncovered a > 'surprise'. Strongly ordered architectures where the atomic RmW > primitive implies full memory ordering and > smp_mb__{before,after}_atomic() are a simple barrier() (such as x86) > fail for: > > *x = 1; > atomic_inc(u); > smp_mb__after_atomic(); > r0 = *y; [snip] > --- a/arch/x86/include/asm/atomic.h > +++ b/arch/x86/include/asm/atomic.h > @@ -54,7 +54,7 @@ static __always_inline void arch_atomic_add(int i, atomic_t *v) > { > asm volatile(LOCK_PREFIX "addl %1,%0" > : "+m" (v->counter) > - : "ir" (i)); > + : "ir" (i) : "memory"); > } > > /** Shouldn't those clobber contraints actually be: "memory","cc" That is because addl subl (and other) machine instructions actually modify the flags register too. gcc docs say: The "cc" clobber indicates that the assembler code modifies the flags register. -- Jari Ruusu 4096R/8132F189 12D6 4C3A DCDA 0AA4 27BD ACDF F073 3C80 8132 F189