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From: Sivaprakash Murugesan <sivaprak@codeaurora.org>
To: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: richard@nod.at, vigneshr@ti.com, peter.ujfalusi@ti.com,
	linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH V2 1/2] mtd: rawnand: qcom: remove write to unavailable register
Date: Thu, 11 Jun 2020 10:00:00 +0530	[thread overview]
Message-ID: <5a82ed80-0ca3-ecb6-2c30-7ac279d437fa@codeaurora.org> (raw)
In-Reply-To: <20200609160217.0b111883@xps13>

Hi Miquel,

On 6/9/2020 7:32 PM, Miquel Raynal wrote:
> Hi Sivaprakash,
>
> Sivaprakash Murugesan <sivaprak@codeaurora.org> wrote on Tue,  9 Jun
> 2020 16:40:55 +0530:
>
>> SFLASHC_BURST_CFG register is not available on all ipq nand platforms,
>> it is available only on ipq8064 devices and the nand controller works
>> without configuring these registers in this platform, so register write
>> to this can be removed.
> Maybe it works because the bootloader is setting the register itself.
> What if you use a different bootloader, or the same bootloader without
> NAND support?
>
> I don't think this is a proper fix, you should instead have a different
> compatible if the IP is not the same and depending on this compatible
> do the write, or not.

I understand your point, will fix this in next patch.

Thanks,

Siva

> Thanks,
> Miquèl

  reply	other threads:[~2020-06-11  4:30 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-09 11:10 [PATCH V2 0/2] Fix issues related to register access in IPQ NAND Sivaprakash Murugesan
2020-06-09 11:10 ` [PATCH V2 1/2] mtd: rawnand: qcom: remove write to unavailable register Sivaprakash Murugesan
2020-06-09 14:02   ` Miquel Raynal
2020-06-11  4:30     ` Sivaprakash Murugesan [this message]
2020-06-09 11:10 ` [PATCH V2 2/2] mtd: rawnand: qcom: set BAM mode only if not set already Sivaprakash Murugesan
2020-06-09 14:03   ` Miquel Raynal
2020-06-11  4:27     ` Sivaprakash Murugesan
2020-06-11  7:13       ` Miquel Raynal

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