Re: [PATCH 3/8] arm64: dts: morello: Add support for common functionalities

Krzysztof Kozlowski
2024-12-14T10:11:30Z

On 13/12/2024 17:32, Vincenzo Frascino wrote:
> The Morello architecture is an experimental extension to Armv8.2-A,
> which extends the AArch64 state with the principles proposed in
> version 7 of the Capability Hardware Enhanced RISC Instructions
> (CHERI) ISA.
>
> The Morello Platform (soc) and the Fixed Virtual Platfom (fvp) share
> some functionalities that have conveniently been included in
> morello.dtsi to avoid duplication.
>
> Introduce morello.dtsi.
>
> Note: Morello fvp will be introduced with a future patch series.
>
> Cc: Sudeep Holla <sudeep.holla@arm.com>
> Cc: Rob Herring <robh@kernel.org>
> Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
> ---
> arch/arm64/boot/dts/arm/morello.dtsi | 112 +++++++++++++++++++++++++++
> 1 file changed, 112 insertions(+)
> create mode 100644 arch/arm64/boot/dts/arm/morello.dtsi
>
> diff --git a/arch/arm64/boot/dts/arm/morello.dtsi b/arch/arm64/boot/dts/arm/morello.dtsi
> new file mode 100644
> index 000000000000..9d84a0840c5b
> --- /dev/null
> +++ b/arch/arm64/boot/dts/arm/morello.dtsi
> @@ -0,0 +1,112 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
> +/*
> + * Copyright (c) 2020-2024, Arm Limited. All rights reserved.
> + */
> +
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +/ {
> + compatible = "arm,morello";
> +
> + interrupt-parent = <&gic>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + aliases {
> + serial0 = &soc_uart0;
> + };
> +
> + gic: interrupt-controller@2c010000 {
> + compatible = "arm,gic-v3";
> + #address-cells = <2>;
> + #interrupt-cells = <3>;
> + #size-cells = <2>;
> + ranges;
> + interrupt-controller;
> + };
> +
> + pmu {
> + compatible = "arm,armv8-pmuv3";
> + interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + spe-pmu {
> + compatible = "arm,statistical-profiling-extension-v1";
> + interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + psci {
> + compatible = "arm,psci-0.2";
> + method = "smc";
> + };
> +
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
> + };
> +
> + mailbox: mhu@45000000 {

You cannot have MMIO nodes outside of soc.

> + compatible = "arm,mhu-doorbell", "arm,primecell";
> + reg = <0x0 0x45000000 0x0 0x1000>;
> + interrupts = <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "mhu-lpri-rx",
> + "mhu-hpri-rx";
> + #mbox-cells = <2>;
> + mbox-name = "ARM-MHU";
> + clocks = <&soc_refclk50mhz>;
> + clock-names = "apb_pclk";
> + };
> +
> + sram: sram@45200000 {
> + compatible = "mmio-sram";
> + reg = <0x0 0x06000000 0x0 0x8000>;
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0x0 0x06000000 0x8000>;
> +
> + cpu_scp_hpri0: scp-sram@0 {
> + compatible = "arm,scmi-shmem";
> + reg = <0x0 0x80>;
> + };
> +
> + cpu_scp_hpri1: scp-sram@80 {
> + compatible = "arm,scmi-shmem";
> + reg = <0x80 0x80>;
> + };
> + };
> +
> + soc_refclk50mhz: refclk50mhz {

Please use name for all fixed clocks which matches current format
recommendation: 'clock-<freq>' (see also the pattern in the binding for
any other options).

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/clock/fixed-clock.yaml?h=v6.11-rc1

> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <50000000>;
> + clock-output-names = "apb_pclk";
> + };
> +
> + soc_refclk85mhz: refclk85mhz {

Please use name for all fixed clocks which matches current format
recommendation: 'clock-<freq>' (see also the pattern in the binding for
any other options).

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/clock/fixed-clock.yaml?h=v6.11-rc1

> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <85000000>;
> + clock-output-names = "iofpga:aclk";
> + };
> +
> + soc_uartclk: uartclk {

Only one space.

Please use name for all fixed clocks which matches current format
recommendation: 'clock-<freq>' (see also the pattern in the binding for
any other options).

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/clock/fixed-clock.yaml?h=v6.11-rc1

> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <50000000>;
> + clock-output-names = "uartclk";
> + };
> +
> + soc_uart0: serial@2a400000 {
> + compatible = "arm,pl011", "arm,primecell";
> + reg = <0x0 0x2a400000 0x0 0x1000>;
> + interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&soc_uartclk>, <&soc_refclk50mhz>;
> + clock-names = "uartclk", "apb_pclk";
> + status = "okay";

Why do you need it? Did you disable it?

> + };
> +};

Best regards,
Krzysztof