Re: [PATCH v11 00/13] Add support for AMD hardware feedback interface

["Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>]

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On Mon, 9 Jun 2025, Mario Limonciello wrote:

> From: Mario Limonciello <mario.limonciello@amd.com>
> 
> The AMD Heterogeneous core design and Hardware Feedback Interface (HFI)
> provide behavioral classification of tasks.
> 
> Threads are classified during runtime into enumerated classes.
> Currently, the driver supports 3 classes (0 through 2). These classes
> represent thread performance/power characteristics that may benefit from
> special scheduling behaviors. The real-time thread classification is
> consumed by the operating system and is intended to be used to inform the scheduler
> of where the thread should be placed for optimal performance or energy efficiency.
> 
> The thread classification can be used to helps to select CPU from a ranking table
> that describes an efficiency and performance ranking for each classification from
> two dimensions. This is not currently done in this series, but is intended for future
> follow ups after the plumbing is laid down.
> 
> The ranking data provided by the ranking table are numbers ranging from 0 to 255,
> where a higher performance value indicates higher performance capability and a higher
> efficiency value indicates greater efficiency. All the CPU cores are ranked into
> different class IDs. Within each class ranking, the cores may have different ranking
> values. Therefore, picking from each classification ID will later allow the scheduler
> to select the best core while threads are classified into the specified workload class.
> 
> This series was originally submitted by Perry Yuan [1] but he is now doing a different
> role and he asked me to take over.
> 
> Link: https://lore.kernel.org/all/cover.1724748733.git.perry.yuan@amd.com/
> 
> v10->v11:
>  * rebase on v6.16-rc1
>  * Adjust for Randy's and Ingo's feedback
> 
> Mario Limonciello (5):
>   MAINTAINERS: Add maintainer entry for AMD Hardware Feedback Driver
>   cpufreq/amd-pstate: Disable preferred cores on designs with workload
>     classification
>   platform/x86/amd: hfi: Set ITMT priority from ranking data
>   platform/x86/amd: hfi: Add debugfs support
>   x86/itmt: Add debugfs file to show core priorities
> 
> Perry Yuan (8):
>   Documentation: x86: Add AMD Hardware Feedback Interface documentation
>   x86/msr-index: define AMD heterogeneous CPU related MSR
>   platform/x86: hfi: Introduce AMD Hardware Feedback Interface Driver
>   platform/x86: hfi: parse CPU core ranking data from shared memory
>   platform/x86: hfi: init per-cpu scores for each class
>   platform/x86: hfi: add online and offline callback support
>   platform/x86: hfi: add power management callback
>   x86/process: Clear hardware feedback history for AMD processors
> 
>  Documentation/arch/x86/amd-hfi.rst    | 133 +++++++
>  Documentation/arch/x86/index.rst      |   1 +
>  MAINTAINERS                           |   9 +
>  arch/x86/include/asm/msr-index.h      |   5 +
>  arch/x86/kernel/itmt.c                |  23 ++
>  arch/x86/kernel/process_64.c          |   4 +
>  drivers/cpufreq/amd-pstate.c          |   6 +
>  drivers/platform/x86/amd/Kconfig      |   1 +
>  drivers/platform/x86/amd/Makefile     |   1 +
>  drivers/platform/x86/amd/hfi/Kconfig  |  18 +
>  drivers/platform/x86/amd/hfi/Makefile |   7 +
>  drivers/platform/x86/amd/hfi/hfi.c    | 551 ++++++++++++++++++++++++++

I don't have objections to this series. But as discussed before, not all 
features are provided by this series and follow-up series will be 
required to provide what are documented as features (perhaps more than 
one).

The pdx86 side seems pretty conflict free as this is new code. If e.g. x86 
wants to merge this due to this series touching existing code there 
(besides the minor cpufreq bits), it would be fine with me,

Acked-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>


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