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([2001:818:ea56:d000:56e0:ceba:7da4:6673]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-441b2af2922sm142017985e9.17.2025.05.04.02.36.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 May 2025 02:36:48 -0700 (PDT) Message-ID: <5bdc6802bc10b71774fb6d839a1a45d94463f4cf.camel@gmail.com> Subject: Re: [PATCH v2] iio: adc: ad7606_spi: add offload scan mask check From: Nuno =?ISO-8859-1?Q?S=E1?= To: David Lechner , Michael Hennerich , Jonathan Cameron , Nuno =?ISO-8859-1?Q?S=E1?= , Andy Shevchenko , Angelo Dureghello Cc: Jonathan Cameron , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org Date: Sun, 04 May 2025 09:37:12 +0100 In-Reply-To: <20250502-iio-adc-ad7606_spi-fix-offload-scan-mask-check-v2-1-e70c6d71baa3@baylibre.com> References: <20250502-iio-adc-ad7606_spi-fix-offload-scan-mask-check-v2-1-e70c6d71baa3@baylibre.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.52.4 (3.52.4-2.fc40) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Fri, 2025-05-02 at 10:42 -0500, David Lechner wrote: > Validate the scan mask when SPI offloading is being used. >=20 > Since this family of ADCs is simultaneous sampling, there isn't a way > to selectively disable channels when reading sample data. (Technically, > AD7616 has a sequencer so could have some control, but that is for > another day). >=20 > For "regular" IIO triggered buffer reads, this isn't a problem and the > IIO core will demux the data and ignore data from disabled channels. > However, since SPI offloading is done completely in hardware, we don't > have a way to do the same. So before this patch, if less than all > channels were enabled, the data would be misplaced in the buffer. >=20 > By adding a check in update_scan_mode, we can fail to enable the buffer > instead of having bad data returned to userspace. >=20 > Fixes: e96d35faf357 ("iio: adc: ad7606: add SPI offload support") > Signed-off-by: David Lechner > --- Reviewed-by: Nuno S=C3=A1 > Changes in v2: > - Use bitmap_weight() instead of bitmap_equal(). > - Link to v1: > https://lore.kernel.org/r/20250430-iio-adc-ad7606_spi-fix-offload-scan-ma= sk-check-v1-1-8b165d9d6c0e@baylibre.com >=20 > And in case it isn't obvious, the patch this fixes is fairly recent, so > this goes in togreg rather than fixes-togreg. > --- > =C2=A0drivers/iio/adc/ad7606_spi.c | 29 +++++++++++++++++++++++++++++ > =C2=A01 file changed, 29 insertions(+) >=20 > diff --git a/drivers/iio/adc/ad7606_spi.c b/drivers/iio/adc/ad7606_spi.c > index > 997be483ebb93293481b922e13ece4edb47e940a..5b5b4677273b15956f1da73da41b16c= 5ee64e818 > 100644 > --- a/drivers/iio/adc/ad7606_spi.c > +++ b/drivers/iio/adc/ad7606_spi.c > @@ -5,6 +5,7 @@ > =C2=A0 * Copyright 2011 Analog Devices Inc. > =C2=A0 */ > =C2=A0 > +#include > =C2=A0#include > =C2=A0#include > =C2=A0#include > @@ -329,19 +330,44 @@ static int ad7606_spi_offload_probe(struct device *= dev, > =C2=A0 return 0; > =C2=A0} > =C2=A0 > +static int ad7606_spi_update_scan_mode(struct iio_dev *indio_dev, > + =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 const unsigned long *scan_mask) > +{ > + struct ad7606_state *st =3D iio_priv(indio_dev); > + > + if (st->offload_en) { > + unsigned int num_adc_ch =3D st->chip_info->num_adc_channels; > + > + /* > + * SPI offload requires that all channels are enabled since > + * there isn't a way to selectively disable channels that get > + * read (this is simultaneous sampling ADC) and the DMA buffer > + * has no way of demuxing the data to filter out unwanted > + * channels. > + */ > + if (bitmap_weight(scan_mask, num_adc_ch) !=3D num_adc_ch) > + return -EINVAL; > + } > + > + return 0; > +} > + > =C2=A0static const struct ad7606_bus_ops ad7606_spi_bops =3D { > =C2=A0 .offload_config =3D ad7606_spi_offload_probe, > =C2=A0 .read_block =3D ad7606_spi_read_block, > + .update_scan_mode =3D ad7606_spi_update_scan_mode, > =C2=A0}; > =C2=A0 > =C2=A0static const struct ad7606_bus_ops ad7607_spi_bops =3D { > =C2=A0 .offload_config =3D ad7606_spi_offload_probe, > =C2=A0 .read_block =3D ad7606_spi_read_block14to16, > + .update_scan_mode =3D ad7606_spi_update_scan_mode, > =C2=A0}; > =C2=A0 > =C2=A0static const struct ad7606_bus_ops ad7608_spi_bops =3D { > =C2=A0 .offload_config =3D ad7606_spi_offload_probe, > =C2=A0 .read_block =3D ad7606_spi_read_block18to32, > + .update_scan_mode =3D ad7606_spi_update_scan_mode, > =C2=A0}; > =C2=A0 > =C2=A0static const struct ad7606_bus_ops ad7616_spi_bops =3D { > @@ -350,6 +376,7 @@ static const struct ad7606_bus_ops ad7616_spi_bops = =3D { > =C2=A0 .reg_read =3D ad7606_spi_reg_read, > =C2=A0 .reg_write =3D ad7606_spi_reg_write, > =C2=A0 .rd_wr_cmd =3D ad7616_spi_rd_wr_cmd, > + .update_scan_mode =3D ad7606_spi_update_scan_mode, > =C2=A0}; > =C2=A0 > =C2=A0static const struct ad7606_bus_ops ad7606b_spi_bops =3D { > @@ -359,6 +386,7 @@ static const struct ad7606_bus_ops ad7606b_spi_bops = =3D { > =C2=A0 .reg_write =3D ad7606_spi_reg_write, > =C2=A0 .rd_wr_cmd =3D ad7606b_spi_rd_wr_cmd, > =C2=A0 .sw_mode_config =3D ad7606b_sw_mode_config, > + .update_scan_mode =3D ad7606_spi_update_scan_mode, > =C2=A0}; > =C2=A0 > =C2=A0static const struct ad7606_bus_ops ad7606c_18_spi_bops =3D { > @@ -368,6 +396,7 @@ static const struct ad7606_bus_ops ad7606c_18_spi_bop= s =3D { > =C2=A0 .reg_write =3D ad7606_spi_reg_write, > =C2=A0 .rd_wr_cmd =3D ad7606b_spi_rd_wr_cmd, > =C2=A0 .sw_mode_config =3D ad7606b_sw_mode_config, > + .update_scan_mode =3D ad7606_spi_update_scan_mode, > =C2=A0}; > =C2=A0 > =C2=A0static const struct ad7606_bus_info ad7605_4_bus_info =3D { >=20 > --- > base-commit: a9b169746d2e299159d4dde190552ae620982bbd > change-id: 20250430-iio-adc-ad7606_spi-fix-offload-scan-mask-check-1d3304= 00c014 >=20 > Best regards,