From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ACCEBC43603 for ; Sat, 14 Dec 2019 01:43:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8EEF82077B for ; Sat, 14 Dec 2019 01:43:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726735AbfLNBnR (ORCPT ); Fri, 13 Dec 2019 20:43:17 -0500 Received: from mga12.intel.com ([192.55.52.136]:46212 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726170AbfLNBnR (ORCPT ); Fri, 13 Dec 2019 20:43:17 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 13 Dec 2019 17:43:16 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,311,1571727600"; d="scan'208";a="226461161" Received: from allen-box.sh.intel.com (HELO [10.239.159.136]) ([10.239.159.136]) by orsmga002.jf.intel.com with ESMTP; 13 Dec 2019 17:43:15 -0800 Cc: baolu.lu@linux.intel.com, Joerg Roedel , iommu@lists.linux-foundation.org, stable@vger.kernel.org Subject: Re: [PATCH] iommu/vt-d: Allocate reserved region for ISA with correct permission To: Jerry Snitselaar , linux-kernel@vger.kernel.org References: <20191213053642.5696-1-jsnitsel@redhat.com> From: Lu Baolu Message-ID: <5ccaaec0-b070-b820-cebd-6b7ad179109c@linux.intel.com> Date: Sat, 14 Dec 2019 09:42:27 +0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.2.1 MIME-Version: 1.0 In-Reply-To: <20191213053642.5696-1-jsnitsel@redhat.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Jerry, On 12/13/19 1:36 PM, Jerry Snitselaar wrote: > Currently the reserved region for ISA is allocated with no > permissions. If a dma domain is being used, mapping this region will > fail. Set the permissions to DMA_PTE_READ|DMA_PTE_WRITE. > > Cc: Joerg Roedel > Cc: Lu Baolu > Cc: iommu@lists.linux-foundation.org > Cc: stable@vger.kernel.org # v5.3+ > Fixes: d850c2ee5fe2 ("iommu/vt-d: Expose ISA direct mapping region via iommu_get_resv_regions") > Signed-off-by: Jerry Snitselaar > --- > drivers/iommu/intel-iommu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c > index 0c8d81f56a30..998529cebcf2 100644 > --- a/drivers/iommu/intel-iommu.c > +++ b/drivers/iommu/intel-iommu.c > @@ -5736,7 +5736,7 @@ static void intel_iommu_get_resv_regions(struct device *device, > struct pci_dev *pdev = to_pci_dev(device); > > if ((pdev->class >> 8) == PCI_CLASS_BRIDGE_ISA) { > - reg = iommu_alloc_resv_region(0, 1UL << 24, 0, > + reg = iommu_alloc_resv_region(0, 1UL << 24, prot, > IOMMU_RESV_DIRECT); This also applies to the IOAPIC range. Can you please change them together? diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c index 0c8d81f56a30..256e48434f68 100644 --- a/drivers/iommu/intel-iommu.c +++ b/drivers/iommu/intel-iommu.c @@ -5736,7 +5736,7 @@ static void intel_iommu_get_resv_regions(struct device *device, struct pci_dev *pdev = to_pci_dev(device); if ((pdev->class >> 8) == PCI_CLASS_BRIDGE_ISA) { - reg = iommu_alloc_resv_region(0, 1UL << 24, 0, + reg = iommu_alloc_resv_region(0, 1UL << 24, prot, IOMMU_RESV_DIRECT); if (reg) list_add_tail(®->list, head); @@ -5746,7 +5746,7 @@ static void intel_iommu_get_resv_regions(struct device *device, reg = iommu_alloc_resv_region(IOAPIC_RANGE_START, IOAPIC_RANGE_END - IOAPIC_RANGE_START + 1, - 0, IOMMU_RESV_MSI); + prot, IOMMU_RESV_MSI); if (!reg) return; list_add_tail(®->list, head); Best regards, baolu > if (reg) > list_add_tail(®->list, head); >