From: Ivan Vecera <ivecera@redhat.com>
To: Rob Herring <robh@kernel.org>, Andrew Lunn <andrew@lunn.ch>
Cc: netdev@vger.kernel.org, Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Vadim Fedorenko <vadim.fedorenko@linux.dev>,
Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>,
Grzegorz Nitka <grzegorz.nitka@intel.com>,
Jiri Pirko <jiri@resnulli.us>, Petr Oros <poros@redhat.com>,
Michal Schmidt <mschmidt@redhat.com>,
Prathosh Satish <Prathosh.Satish@microchip.com>,
Tony Nguyen <anthony.l.nguyen@intel.com>,
Przemek Kitszel <przemyslaw.kitszel@intel.com>,
Saeed Mahameed <saeedm@nvidia.com>,
Leon Romanovsky <leon@kernel.org>,
Tariq Toukan <tariqt@nvidia.com>, Mark Bloch <mbloch@nvidia.com>,
Richard Cochran <richardcochran@gmail.com>,
Jonathan Lemon <jonathan.lemon@gmail.com>,
Simon Horman <horms@kernel.org>,
Alexander Lobakin <aleksander.lobakin@intel.com>,
Willem de Bruijn <willemb@google.com>,
Stefan Wahren <wahrenst@gmx.net>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
intel-wired-lan@lists.osuosl.org, linux-rdma@vger.kernel.org,
Horatiu Vultur <Horatiu.Vultur@microchip.com>
Subject: Re: [PATCH RFC net-next 01/13] dt-bindings: net: ethernet-controller: Add DPLL pin properties
Date: Mon, 5 Jan 2026 17:23:42 +0100 [thread overview]
Message-ID: <5db81f5b-4f35-46e4-8fec-4298f1ac0c4e@redhat.com> (raw)
In-Reply-To: <20251217004946.GA3445804-robh@kernel.org>
On 12/17/25 1:49 AM, Rob Herring wrote:
> On Thu, Dec 11, 2025 at 08:56:52PM +0100, Andrew Lunn wrote:
>> On Thu, Dec 11, 2025 at 08:47:44PM +0100, Ivan Vecera wrote:
>>> Ethernet controllers may be connected to DPLL (Digital Phase Locked Loop)
>>> pins for frequency synchronization purposes, such as in Synchronous
>>> Ethernet (SyncE) configurations.
>>>
>>> Add 'dpll-pins' and 'dpll-pin-names' properties to the generic
>>> ethernet-controller schema. This allows describing the physical
>>> connections between the Ethernet controller and the DPLL subsystem pins
>>> in the Device Tree, enabling drivers to request and manage these
>>> resources.
>>
>> Please include a .dts patch in the series which actually makes use of
>> these new properties.
>
> Actually, first you need a device (i.e. a specific ethernet
> controller bindings) using this and defining the number of dpll-pins
> entries and the names.
The goal of this patch is to define properties that allow referencing
dpll pins from other devices. I included it in this series to allow
implementing helpers that use the property names defined in the schema.
This series implements the dpll pin consumer in the ice driver. This is
usually present on ACPI platforms, so the properties are stored in _DSD
ACPI nodes. Although I don't have a DT user right now, isn't it better
to define the schema now?
Thinking about this further, consumers could be either an Ethernet
controller (where the PHY is not exposed and is driven directly by the
NIC driver) or an Ethernet PHY.
For the latter case (Ethernet PHY), I have been preparing a similar
implementation for the Micrel phy driver (lan8814) on the Microchip EDS2
board (pcb8385). Unfortunately, the DTS is not upstreamed yet [1], so I
cannot include the necessary bindings here.
Since there can be multiple consumer types (Ethernet controller or PHY),
would it be better to define a dpll-pin-consumer.yaml schema instead
(similar to mux-consumer)?
Thanks for the advice,
Ivan
[1]
https://patchwork.kernel.org/project/linux-arm-kernel/list/?series=1031294&state=*
next prev parent reply other threads:[~2026-01-05 16:24 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-11 19:47 [PATCH RFC net-next 00/13] dpll: Core improvements and ice E825-C SyncE support Ivan Vecera
2025-12-11 19:47 ` [PATCH RFC net-next 01/13] dt-bindings: net: ethernet-controller: Add DPLL pin properties Ivan Vecera
2025-12-11 19:56 ` Andrew Lunn
2025-12-14 20:41 ` Ivan Vecera
2025-12-17 0:49 ` Rob Herring
2026-01-05 16:23 ` Ivan Vecera [this message]
2026-01-07 15:15 ` Rob Herring
2026-01-07 16:23 ` Ivan Vecera
2026-01-07 17:31 ` Andrew Lunn
2026-01-07 19:18 ` Ivan Vecera
2025-12-11 19:47 ` [PATCH RFC net-next 02/13] dpll: Allow registering pin with firmware node Ivan Vecera
2025-12-12 11:25 ` Jiri Pirko
2025-12-14 19:35 ` Ivan Vecera
2025-12-15 13:08 ` Jiri Pirko
2025-12-15 13:51 ` Ivan Vecera
2025-12-15 14:09 ` Jiri Pirko
2025-12-11 19:47 ` [PATCH RFC net-next 03/13] net: eth: Add helpers to find DPLL pin " Ivan Vecera
2025-12-11 19:47 ` [PATCH RFC net-next 04/13] dpll: zl3073x: register pins with fwnode handle Ivan Vecera
2025-12-11 19:47 ` [PATCH RFC net-next 05/13] dpll: Add notifier chain for dpll events Ivan Vecera
2025-12-11 19:47 ` [PATCH RFC net-next 06/13] dpll: Support dynamic pin index allocation Ivan Vecera
2025-12-15 14:10 ` Przemek Kitszel
2025-12-15 14:43 ` Ivan Vecera
2025-12-11 19:47 ` [PATCH RFC net-next 07/13] dpll: zl3073x: Add support for mux pin type Ivan Vecera
2025-12-11 19:47 ` [PATCH RFC net-next 08/13] dpll: Enhance and consolidate reference counting logic Ivan Vecera
2025-12-11 19:47 ` [PATCH RFC net-next 09/13] dpll: Prevent duplicate registrations Ivan Vecera
2025-12-11 19:47 ` [PATCH RFC net-next 10/13] dpll: Add reference count tracking support Ivan Vecera
2025-12-11 19:47 ` [PATCH RFC net-next 11/13] dpll: zl3073x: Enable reference count tracking Ivan Vecera
2025-12-12 11:11 ` Jiri Pirko
2025-12-11 19:47 ` [PATCH RFC net-next 12/13] ice: dpll: " Ivan Vecera
2025-12-11 19:47 ` [PATCH RFC net-next 13/13] ice: dpll: Support E825-C SyncE and dynamic pin discovery Ivan Vecera
2025-12-12 10:20 ` [Intel-wired-lan] " Loktionov, Aleksandr
2025-12-14 19:30 ` Ivan Vecera
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