From: Lijun Pan <lijun.pan@intel.com>
To: 'Guanjun' <guanjun@linux.alibaba.com>, <dave.jiang@intel.com>,
<dmaengine@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<vkoul@kernel.org>, <tony.luck@intel.com>, <fenghua.yu@intel.com>
Cc: <jing.lin@intel.com>, <ashok.raj@intel.com>,
<sanjay.k.kumar@intel.com>, <megha.dey@intel.com>,
<jacob.jun.pan@intel.com>, <yi.l.liu@intel.com>,
<tglx@linutronix.de>
Subject: Re: [PATCH v4 1/2] dmaengine: idxd: Protect int_handle field in hw descriptor
Date: Tue, 31 Oct 2023 10:57:46 -0500 [thread overview]
Message-ID: <5dca6853-cd14-a8fc-ce1b-b64b1b8b3412@intel.com> (raw)
In-Reply-To: <20231031025511.1516342-2-guanjun@linux.alibaba.com>
On 10/30/2023 9:55 PM, 'Guanjun' wrote:
> From: Guanjun <guanjun@linux.alibaba.com>
>
> The int_handle field in hw descriptor should also be protected
> by wmb() before possibly triggering a DMA read.
>
> Fixes: ec0d64231615 (dmaengine: idxd: embed irq_entry in idxd_wq struct)
I think the direct fix is to eb0cf33a91b4 which moves the interrupt
handle assignment to idxd_submit_desc() and has a write to
desc->hw->int_handle before submission of desc->hw.
Fixes: eb0cf33a91b4 ("dmaengine: idxd: move interrupt handle assignment")
Other than that,
Reviewed-by: Lijun Pan <lijun.pan@intel.com>
> Signed-off-by: Guanjun <guanjun@linux.alibaba.com>
> Reviewed-by: Dave Jiang <dave.jiang@intel.com>
> Reviewed-by: Fenghua Yu <fenghua.yu@intel.com>
> ---
> drivers/dma/idxd/submit.c | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/dma/idxd/submit.c b/drivers/dma/idxd/submit.c
> index c01db23e3333..3f922518e3a5 100644
> --- a/drivers/dma/idxd/submit.c
> +++ b/drivers/dma/idxd/submit.c
> @@ -182,13 +182,6 @@ int idxd_submit_desc(struct idxd_wq *wq, struct idxd_desc *desc)
>
> portal = idxd_wq_portal_addr(wq);
>
> - /*
> - * The wmb() flushes writes to coherent DMA data before
> - * possibly triggering a DMA read. The wmb() is necessary
> - * even on UP because the recipient is a device.
> - */
> - wmb();
> -
> /*
> * Pending the descriptor to the lockless list for the irq_entry
> * that we designated the descriptor to.
> @@ -199,6 +192,13 @@ int idxd_submit_desc(struct idxd_wq *wq, struct idxd_desc *desc)
> llist_add(&desc->llnode, &ie->pending_llist);
> }
>
> + /*
> + * The wmb() flushes writes to coherent DMA data before
> + * possibly triggering a DMA read. The wmb() is necessary
> + * even on UP because the recipient is a device.
> + */
> + wmb();
> +
> if (wq_dedicated(wq)) {
> iosubmit_cmds512(portal, desc->hw, 1);
> } else {
next prev parent reply other threads:[~2023-10-31 15:58 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-31 2:55 [PATCH v4 0/2] Some fixes for idxd driver 'Guanjun'
2023-10-31 2:55 ` [PATCH v4 1/2] dmaengine: idxd: Protect int_handle field in hw descriptor 'Guanjun'
2023-10-31 15:57 ` Lijun Pan [this message]
2023-10-31 2:55 ` [PATCH v4 2/2] dmaengine: idxd: Fix incorrect descriptions for GRPCFG register 'Guanjun'
2023-10-31 16:23 ` Lijun Pan
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