Re: [PATCH] arm64: dts: qcom: sdm845-cheza: Add cr50 spi node

[Stephen Boyd <swboyd@chromium.org>]

Quoting Doug Anderson (2019-12-16 14:53:22)
> Hi,
> 
> On Mon, Dec 16, 2019 at 1:16 PM Stephen Boyd <swboyd@chromium.org> wrote:
> >
> > Add the cr50 device to the spi controller it is attached to. This
> > enables /dev/tpm0 and some login things on Cheza.
> >
> > Cc: Douglas Anderson <dianders@chromium.org>
> > Signed-off-by: Stephen Boyd <swboyd@chromium.org>
> > ---
> >  arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi | 14 ++++++++++++++
> >  1 file changed, 14 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi b/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi
> > index 9a4ff57fc877..f6683460dc82 100644
> > --- a/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi
> > @@ -651,6 +651,20 @@ &spi0 {
> >         status = "okay";
> >  };
> >
> > +&spi5 {
> > +       status = "okay";
> > +
> > +       cr50@0 {
> 
> Between v2 and v3 of your upstream bindings you changed this from
> "cr50@0" to "tpm@0" in the example.  I'm going to assume you did that
> for some reason and you should be matching the binding example here.
> ...or you should change the binding example to be cr50@.
> 

Oh yeha, will fix and resend.

> 
> > +               compatible = "google,cr50";
> > +               reg = <0>;
> > +               pinctrl-names = "default";
> > +               pinctrl-0 = <&h1_ap_int_odl>;
> > +               spi-max-frequency = <800000>;
> > +               interrupt-parent = <&tlmm>;
> > +               interrupts = <129 IRQ_TYPE_EDGE_RISING>;
> 
> Certainly we need an interrupt, but I don't see it in the bindings.
> Any idea why it isn't there?
> 

I just forward ported the binding and didn't look back. I'm converting
it to YAML so I'll roll that fix in. Thanks.